}
void Pipeline::run() {
- while (hasWorkToProcess())
- runCycle(Cycles++);
+ while (hasWorkToProcess()) {
+ notifyCycleBegin();
+ runCycle();
+ notifyCycleEnd();
+ ++Cycles;
+ }
}
-void Pipeline::runCycle(unsigned Cycle) {
- notifyCycleBegin(Cycle);
-
+void Pipeline::runCycle() {
// Update the stages before we do any processing for this cycle.
InstRef IR;
for (auto &S : Stages)
for (auto &S : Stages)
S->cycleEnd();
-
- notifyCycleEnd(Cycle);
}
-void Pipeline::notifyCycleBegin(unsigned Cycle) {
- LLVM_DEBUG(dbgs() << "[E] Cycle begin: " << Cycle << '\n');
+void Pipeline::notifyCycleBegin() {
+ LLVM_DEBUG(dbgs() << "[E] Cycle begin: " << Cycles << '\n');
for (HWEventListener *Listener : Listeners)
Listener->onCycleBegin();
}
-void Pipeline::notifyCycleEnd(unsigned Cycle) {
- LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycle << "\n\n");
+void Pipeline::notifyCycleEnd() {
+ LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n\n");
for (HWEventListener *Listener : Listeners)
Listener->onCycleEnd();
}
void preExecuteStages(const InstRef &IR);
bool executeStages(InstRef &IR);
void postExecuteStages(const InstRef &IR);
+ void runCycle();
+
bool hasWorkToProcess();
- void runCycle(unsigned Cycle);
+ void notifyCycleBegin();
+ void notifyCycleEnd();
public:
Pipeline(unsigned DispatchWidth = 0, unsigned RegisterFileSize = 0,
void appendStage(std::unique_ptr<Stage> S) { Stages.push_back(std::move(S)); }
void run();
void addEventListener(HWEventListener *Listener);
- void notifyCycleBegin(unsigned Cycle);
- void notifyCycleEnd(unsigned Cycle);
};
} // namespace mca