[VM][PC9801][SYSREG] Make readonly to PIO_SYS:PORT_B.
[VM][PC9801][SASI_BIOS] Make simplify Bios handling.
#if !defined(SUPPORT_HIRESO)
case 0x00cc:
case 0x00ce:
- if(((addr >> 4) & 1) == (modereg & 1))
#endif
+ if(((((addr >> 4) & 0xff) ^ modereg) & 1) != 0) return;
{
if(!(ctrlreg & 0x80) && (data & 0x80)) {
d_fdc->reset();
#endif
#if defined(SUPPORT_2HD_2DD_FDD_IF)
case 0x0090:
-#if !defined(SUPPORT_HIRESO)
+ #if !defined(SUPPORT_HIRESO)
case 0x00c8:
if(((addr >> 4) & 1) == (modereg & 1))
-#endif
+ #endif
{
return d_fdc->read_io8(0);
}
break;
case 0x0092:
-#if !defined(SUPPORT_HIRESO)
+ #if !defined(SUPPORT_HIRESO)
case 0x00ca:
if(((addr >> 4) & 1) == (modereg & 1))
-#endif
+ #endif
{
return d_fdc->read_io8(1);
}
break;
case 0x0094:
case 0x0096:
-#if !defined(SUPPORT_HIRESO)
- if(modereg & 1) {
+ #if !defined(SUPPORT_HIRESO)
+ case 0x00cc:
+ case 0x00ce:
+ #endif
+ if(((((addr >> 4) & 0xff) ^ modereg) & 1) != 0) return 0xff; // From NP2
+ #if !defined(SUPPORT_HIRESO)
+ {
// value |= 0x80; // FINT1 (DIP SW 1-7), 1 = OFF, 0 = ON
value |= 0x40; // FINT0 (DIP SW 1-6), 1 = OFF, 0 = ON
// value |= 0x20; // DMACH (DIP SW 1-3), 1 = OFF, 0 = ON
// value |= 0x08; // TYP1,0 (DIP SW 1-4), 1,0 = ON Internal FDD: #3,#4, External FDD: #1,#2
value |= 0x04; // TYP1,0 (DIP SW 1-4), 0,1 = OFF Internal FDD: #1,#2, External FDD: #3,#4
+ if((addr & 0x10) == 0) {
+ value |= 0x20; // DMACH (DIP SW 1-3), 1 = OFF, 0 = ON
+ value |= 0x10; // READY
+ }
return value;
}
-#else
+ #else
// value |= 0x80; // MODE, 0 = Internal FDD existing
value |= ctrlreg & 0x20; // High Density, 1 = 640KB, 0 = 1MB
return value;
-#endif
+ #endif
break;
-#if !defined(SUPPORT_HIRESO)
+ #if !defined(SUPPORT_HIRESO)
case 0x00bc: // OK?
case 0x00be:
- //return 0xf8 | (modereg & 3);
+ return 0x08 | (modereg & 3);
// ToDo: DIPSW 3-2 and 3-1
// ToDo: Three mode FDD.
- return 0xfc | (modereg & 3);
- case 0x00cc:
- case 0x00ce:
- if(!(modereg & 1)) {
-// value |= 0x80; // FINT1 (DIP SW 1-7), 1 = OFF, 0 = ON
- value |= 0x40; // FINT0 (DIP SW 1-6), 1 = OFF, 0 = ON
- value |= 0x20; // DMACH (DIP SW 1-3), 1 = OFF, 0 = ON
-// value |= 0x08; // TYP1,0 (DIP SW 1-4), 1,0 = ON Internal FDD: #3,#4, External FDD: #1,#2
- value |= 0x04; // TYP1,0 (DIP SW 1-4), 0,1 = OFF Internal FDD: #1,#2, External FDD: #3,#4
- if(d_fdc->is_disk_inserted()) {
- value |= 0x10; // RDY
- }
- return value;
- }
+// return 0xfc | (modereg & 3);
break;
-#endif
+ #endif
#endif
}
return 0xff;//addr & 0xff;
io->set_iomap_alias_w (0x0037, pio_sys, 3);
io->set_iomap_alias_rw(0x0040, pio_prn, 0);
- io->set_iomap_alias_rw(0x0042, pio_prn, 1);
+ io->set_iomap_alias_r (0x0042, pio_prn, 1);
io->set_iomap_alias_rw(0x0044, pio_prn, 2);
io->set_iomap_alias_w (0x0046, pio_prn, 3);
uint8_t port_a, port_b, port_c, port_b2;
#if defined(USE_MONITOR_TYPE) /*&& defined(SUPPORT_HIRESO)*/
#if !defined(SUPPORT_HIRESO)
- io->set_iovalue_single_r(0x0467, 0xfe); // Detect high-reso.
- io->set_iovalue_single_r(0x0ca0, 0xff); // Detect high-reso.
+ io->set_iovalue_single_r(0x0467, 0xfd); // Detect high-reso.
+// io->set_iovalue_single_r(0x0ca0, 0xff); // Detect high-reso.
#endif
if(config.monitor_type == 0) {
#if defined(SUPPORT_HIRESO)
- io->set_iovalue_single_r(0x0431, 0x00);
+// io->set_iovalue_single_r(0x0431, 0x00);
#else
- io->set_iovalue_single_r(0x0431, 0x04);
+// io->set_iovalue_single_r(0x0431, 0x04);
#endif
gdc_gfx->set_horiz_freq(24830);
gdc_chr->set_horiz_freq(24830);
} else { // WIP
- io->set_iovalue_single_r(0x0431, 0x04); // bit2: 1 = Normal mode, 0 = Hireso mode
+// io->set_iovalue_single_r(0x0431, 0x04); // bit2: 1 = Normal mode, 0 = Hireso mode
gdc_gfx->set_horiz_freq(15750);
gdc_chr->set_horiz_freq(15750);
}
#else
- io->set_iovalue_single_r(0x0431, 0x04);
+// io->set_iovalue_single_r(0x0431, 0x04);
#endif
// reset all devices
for(DEVICE* device = first_device; device; device = device->next_device) {
this->out_debug_log(_T("%6x\tDISK BIOS: AH=%2x,AL=%2x,CX=%4x,DX=%4x,BX=%4x,DS=%2x,DI=%2x\n"), get_cpu_pc(0), AH,AL,CX,DX,BX,DS,DI);
#endif
// ToDo: Check ITF BANK for EPSON :
- // IF (ITF_ENABLED) && ((0xf8000 <= PC < 0x10000)) NOT CALL BIOS
- if(d_mem->is_sasi_bios_load()) return false;
// Check ADDRESS: This pseudo-bios acts only $fffc4 ($1B) or $00ffffc4:
if((PC != 0xfffc4) && (PC != 0x00ffffc4)) return false; // INT 1Bh
+
static const int elapsed_cycle = 200; // From NP2 0.86+trunk/ OK?
#if 1
uint8_t seg = d_mem->read_data8(0x004b0 + (AL >> 4));
uint32_t sp, ss;
if ((seg != 0)) {
+#if !defined(_PC9801) && !defined(_PC9801E) && !defined(_PC9801F) && !defined(_PC9801M)
if(seg == 0xd7) goto __next; // To Pseudo SASI BIOS.
+#endif
#ifdef _PSEUDO_BIOS_DEBUG
this->out_debug_log(_T("%6x\tDISK BIOS: AH=%2x,AL=%2x,CX=%4x,DX=%4x,BX=%4x,DS=%2x,DI=%2x\n"), get_cpu_pc(0), AH,AL,CX,DX,BX,DS,DI);
#endif
switch(AL & 0xf0) {
case 0xc0:
// ToDo: SCSI BIOS
- return false;
+// return false;
break;
case 0x00:
case 0x80:
- if(sasi_bios(PC, regs, sregs, ZeroFlag, CarryFlag)) {
- need_retcall = true;
+ if(!(d_mem->is_sasi_bios_load())) {
+ if(sasi_bios(PC, regs, sregs, ZeroFlag, CarryFlag)) {
#ifdef _PSEUDO_BIOS_DEBUG
- out_debug_log(_T("SASI BIOS CALL SUCCESS:\n From AX=%04x BX=%04x CX=%04x DX=%04x\n To AX=%04x BX=%04x CX=%04x DX=%04x\n"), backup_ax, backup_bx, backup_cx, backup_dx, AX, BX, CX, DX);
+ out_debug_log(_T("SASI BIOS CALL SUCCESS:\n From AX=%04x BX=%04x CX=%04x DX=%04x\n To AX=%04x BX=%04x CX=%04x DX=%04x\n"), backup_ax, backup_bx, backup_cx, backup_dx, AX, BX, CX, DX);
#endif
- } else {
+ } else {
#ifdef _PSEUDO_BIOS_DEBUG
- out_debug_log(_T("SASI BIOS CALL FAILED:\n From AX=%04x BX=%04x CX=%04x DX=%04x\n To AX=%04x BX=%04x CX=%04x DX=%04x\n"), backup_ax, backup_bx, backup_cx, backup_dx, AX, BX, CX, DX);
+ out_debug_log(_T("SASI BIOS CALL FAILED:\n From AX=%04x BX=%04x CX=%04x DX=%04x\n To AX=%04x BX=%04x CX=%04x DX=%04x\n"), backup_ax, backup_bx, backup_cx, backup_dx, AX, BX, CX, DX);
#endif
+ }
need_retcall = true;
}
break;
default:
- return false;
+// return false;
break;
}
if(need_retcall) {