intel: Don't tile-align pitch for untiled buffers.

This allows Mesa to use drm_intel_bo_alloc_tiled() for its tiled
buffers, since it makes its decision about pitch before telling
libdrm.  They happen to be the same choices for the tiled case.

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 38e0ed9..9cf4095 100644 (file)
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -258,7 +258,7 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
        unsigned long i;
 
        if (tiling_mode == I915_TILING_NONE)
-               return ROUND_UP_TO(pitch, tile_width);
+               return pitch;
 
        /* 965 is flexible */
        if (bufmgr_gem->gen >= 4)