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drm/i915: Fix the TBT AUX power well enabling
authorImre Deak <imre.deak@intel.com>
Fri, 28 Jun 2019 14:36:18 +0000 (17:36 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 1 Jul 2019 11:50:01 +0000 (14:50 +0300)
Fix the mapping from a TBT AUX power well index to the DP_AUX_CH_CTL
register.

Fixes: c7375d9542f1 ("drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190628143635.22066-7-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c

index 217787d..fd13cd6 100644 (file)
@@ -444,16 +444,23 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
 #define ICL_AUX_PW_TO_CH(pw_idx)       \
        ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
 
+#define ICL_TBT_AUX_PW_TO_CH(pw_idx)   \
+       ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C)
+
 static void
 icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
                                 struct i915_power_well *power_well)
 {
-       enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(power_well->desc->hsw.idx);
+       int pw_idx = power_well->desc->hsw.idx;
+       bool is_tbt = power_well->desc->hsw.is_tc_tbt;
+       enum aux_ch aux_ch;
        u32 val;
 
+       aux_ch = is_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
+                         ICL_AUX_PW_TO_CH(pw_idx);
        val = I915_READ(DP_AUX_CH_CTL(aux_ch));
        val &= ~DP_AUX_CH_CTL_TBT_IO;
-       if (power_well->desc->hsw.is_tc_tbt)
+       if (is_tbt)
                val |= DP_AUX_CH_CTL_TBT_IO;
        I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);