arm64: dts: qcom: sdm845: Add gsi dma node

This add the device node for gsi dma0 instances found in sdm845.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222041951.1185186-1-vkoul@kernel.org

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0d6286d..00dd166 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1125,6 +1125,29 @@
                        };
                };
 
+               gpi_dma0: dma-controller@800000 {
+                       #dma-cells = <3>;
+                       compatible = "qcom,sdm845-gpi-dma";
+                       reg = <0 0x00800000 0 0x60000>;
+                       interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-channels = <13>;
+                       dma-channel-mask = <0xfa>;
+                       iommus = <&apps_smmu 0x0016 0x0>;
+                       status = "disabled";
+               };
+
                qupv3_id_0: geniqup@8c0000 {
                        compatible = "qcom,geni-se-qup";
                        reg = <0 0x008c0000 0 0x6000>;
@@ -1544,6 +1567,29 @@
                        };
                };
 
+               gpi_dma1: dma-controller@0xa00000 {
+                       #dma-cells = <3>;
+                       compatible = "qcom,sdm845-gpi-dma";
+                       reg = <0 0x00a00000 0 0x60000>;
+                       interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-channels = <13>;
+                       dma-channel-mask = <0xfa>;
+                       iommus = <&apps_smmu 0x06d6 0x0>;
+                       status = "disabled";
+               };
+
                qupv3_id_1: geniqup@ac0000 {
                        compatible = "qcom,geni-se-qup";
                        reg = <0 0x00ac0000 0 0x6000>;