Subzero: Remove unneeded ScratchRegs.

These static members of the various TargetLowering classes are no longer used anywhere and can therefore be removed.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1599803002 .

diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index 5d227fa..02097ed 100644 (file)
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -286,7 +286,6 @@ void TargetARM32::staticInit(GlobalContext *Ctx) {
   llvm::SmallBitVector Float64Registers(RegARM32::Reg_NUM);
   llvm::SmallBitVector VectorRegisters(RegARM32::Reg_NUM);
   llvm::SmallBitVector InvalidRegisters(RegARM32::Reg_NUM);
-  ScratchRegs.resize(RegARM32::Reg_NUM);
   for (int i = 0; i < RegARM32::Reg_NUM; ++i) {
     const auto &Entry = RegARM32::RegTable[i];
     IntegerRegisters[i] = Entry.IsInt;
@@ -294,7 +293,6 @@ void TargetARM32::staticInit(GlobalContext *Ctx) {
     Float32Registers[i] = Entry.IsFP32;
     Float64Registers[i] = Entry.IsFP64;
     VectorRegisters[i] = Entry.IsVec128;
-    ScratchRegs[i] = Entry.Scratch;
     RegisterAliases[i].resize(RegARM32::Reg_NUM);
     for (int j = 0; j < Entry.NumAliases; ++j) {
       assert(i == j || !RegisterAliases[i][Entry.Aliases[j]]);
@@ -6455,7 +6453,6 @@ void TargetHeaderARM32::lower() {
 
 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
-llvm::SmallBitVector TargetARM32::ScratchRegs;
 
 } // end of namespace ARM32
 } // end of namespace Ice

diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index 814ef75..c0e142e 100644 (file)
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -1015,7 +1015,6 @@ protected:
   // TODO(jpp): std::array instead of array.
   static llvm::SmallBitVector TypeToRegisterSet[RegARM32::RCARM32_NUM];
   static llvm::SmallBitVector RegisterAliases[RegARM32::Reg_NUM];
-  static llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
   VarList PreservedGPRs;

diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index 50241a6..248c073 100644 (file)
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -72,7 +72,6 @@ void TargetMIPS32::staticInit(GlobalContext *Ctx) {
   llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM);
-  ScratchRegs.resize(RegMIPS32::Reg_NUM);
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isI64Pair, isFP32, isFP64, isVec128, alias_init)                     \
   IntegerRegisters[RegMIPS32::val] = isInt;                                    \
@@ -87,8 +86,7 @@ void TargetMIPS32::staticInit(GlobalContext *Ctx) {
     RegisterAliases[RegMIPS32::val].set(RegAlias);                             \
   }                                                                            \
   RegisterAliases[RegMIPS32::val].resize(RegMIPS32::Reg_NUM);                  \
-  assert(RegisterAliases[RegMIPS32::val][RegMIPS32::val]);                     \
-  ScratchRegs[RegMIPS32::val] = scratch;
+  assert(RegisterAliases[RegMIPS32::val][RegMIPS32::val]);
   REGMIPS32_TABLE;
 #undef X
   TypeToRegisterSet[IceType_void] = InvalidRegisters;
@@ -1119,7 +1117,6 @@ void TargetHeaderMIPS32::lower() {
 
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
-llvm::SmallBitVector TargetMIPS32::ScratchRegs;
 
 } // end of namespace MIPS32
 } // end of namespace Ice

diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index b91693e..4fdb081 100644 (file)
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -264,7 +264,6 @@ protected:
   bool NeedsStackAlignment = false;
   static llvm::SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
   static llvm::SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
-  static llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
 

diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index 694de61..bff2066 100644 (file)
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -111,10 +111,6 @@ std::array<llvm::SmallBitVector,
     TargetX86Base<X8632::Traits>::RegisterAliases = {{}};
 
 template <>
-llvm::SmallBitVector
-    TargetX86Base<X8632::Traits>::ScratchRegs = llvm::SmallBitVector();
-
-template <>
 FixupKind TargetX86Base<X8632::Traits>::PcRelFixup =
     TargetX86Base<X8632::Traits>::Traits::FK_PcRel;
 

diff --git a/src/IceTargetLoweringX8632Traits.h b/src/IceTargetLoweringX8632Traits.h
index 22faa50..d804bb2 100644 (file)
--- a/src/IceTargetLoweringX8632Traits.h
+++ b/src/IceTargetLoweringX8632Traits.h
@@ -447,8 +447,7 @@ public:
   static void initRegisterSet(
       const ::Ice::ClFlags & /*Flags*/,
       std::array<llvm::SmallBitVector, RCX86_NUM> *TypeToRegisterSet,
-      std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases,
-      llvm::SmallBitVector *ScratchRegs) {
+      std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases) {
     llvm::SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
@@ -460,7 +459,6 @@ public:
     llvm::SmallBitVector Trunc8RcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector AhRcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM);
-    ScratchRegs->resize(RegisterSet::Reg_NUM);
 
     static constexpr struct {
       uint16_t Val;
@@ -474,7 +472,6 @@ public:
       unsigned Is16To8 : 1;
       unsigned IsTrunc8Rcvr : 1;
       unsigned IsAhRcvr : 1;
-      unsigned Scratch : 1;
 #define NUM_ALIASES_BITS 2
       SizeT NumAliases : (NUM_ALIASES_BITS + 1);
       uint16_t Aliases[1 << NUM_ALIASES_BITS];
@@ -485,7 +482,7 @@ public:
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   {                                                                            \
     RegisterSet::val, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
-        isTrunc8Rcvr, isAhRcvr, scratch, (SizeOf aliases).size(), aliases,     \
+        isTrunc8Rcvr, isAhRcvr, (SizeOf aliases).size(), aliases,              \
   }                                                                            \
   ,
         REGX8632_TABLE
@@ -511,7 +508,6 @@ public:
         (*RegisterAliases)[Entry.Val].set(Alias);
       }
       (*RegisterAliases)[Entry.Val].set(Entry.Val);
-      (*ScratchRegs)[Entry.Val] = Entry.Scratch;
     }
 
     (*TypeToRegisterSet)[RC_void] = InvalidRegisters;

diff --git a/src/IceTargetLoweringX8664.cpp b/src/IceTargetLoweringX8664.cpp
index 9f3feea..89f8208 100644 (file)
--- a/src/IceTargetLoweringX8664.cpp
+++ b/src/IceTargetLoweringX8664.cpp
@@ -111,10 +111,6 @@ std::array<llvm::SmallBitVector,
     TargetX86Base<X8664::Traits>::RegisterAliases = {{}};
 
 template <>
-llvm::SmallBitVector
-    TargetX86Base<X8664::Traits>::ScratchRegs = llvm::SmallBitVector();
-
-template <>
 FixupKind TargetX86Base<X8664::Traits>::PcRelFixup =
     TargetX86Base<X8664::Traits>::Traits::FK_PcRel;
 

diff --git a/src/IceTargetLoweringX8664Traits.h b/src/IceTargetLoweringX8664Traits.h
index b206817..39c5b95 100644 (file)
--- a/src/IceTargetLoweringX8664Traits.h
+++ b/src/IceTargetLoweringX8664Traits.h
@@ -492,8 +492,7 @@ public:
   static void initRegisterSet(
       const ::Ice::ClFlags &Flags,
       std::array<llvm::SmallBitVector, RCX86_NUM> *TypeToRegisterSet,
-      std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases,
-      llvm::SmallBitVector *ScratchRegs) {
+      std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases) {
     llvm::SmallBitVector IntegerRegistersI64(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM);
@@ -506,7 +505,6 @@ public:
     llvm::SmallBitVector Trunc8RcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector AhRcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM);
-    ScratchRegs->resize(RegisterSet::Reg_NUM);
 
     static constexpr struct {
       uint16_t Val;
@@ -521,7 +519,6 @@ public:
       unsigned Is16To8 : 1;
       unsigned IsTrunc8Rcvr : 1;
       unsigned IsAhRcvr : 1;
-      unsigned Scratch : 1;
 #define NUM_ALIASES_BITS 2
       SizeT NumAliases : (NUM_ALIASES_BITS + 1);
       uint16_t Aliases[1 << NUM_ALIASES_BITS];
@@ -532,8 +529,7 @@ public:
           is16To8, isTrunc8Rcvr, isAhRcvr, aliases)                            \
   {                                                                            \
     RegisterSet::val, sboxres, is64, is32, is16, is8, isXmm, is64To8, is32To8, \
-        is16To8, isTrunc8Rcvr, isAhRcvr, scratch, (SizeOf aliases).size(),     \
-        aliases,                                                               \
+        is16To8, isTrunc8Rcvr, isAhRcvr, (SizeOf aliases).size(), aliases,     \
   }                                                                            \
   ,
         REGX8664_TABLE
@@ -570,7 +566,6 @@ public:
       (Trunc16To8Registers)[Entry.Val] = Entry.Is16To8;
       (Trunc8RcvrRegisters)[Entry.Val] = Entry.IsTrunc8Rcvr;
       (AhRcvrRegisters)[Entry.Val] = Entry.IsAhRcvr;
-      (*ScratchRegs)[Entry.Val] = Entry.Scratch;
     }
 
     (*TypeToRegisterSet)[RC_void] = InvalidRegisters;

diff --git a/src/IceTargetLoweringX86Base.h b/src/IceTargetLoweringX86Base.h
index ff9274f..cc3bd73 100644 (file)
--- a/src/IceTargetLoweringX86Base.h
+++ b/src/IceTargetLoweringX86Base.h
@@ -902,7 +902,6 @@ protected:
   static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet;
   static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM>
       RegisterAliases;
-  static llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   std::array<VarList, IceType_NUM> PhysicalRegisters;
   // GotVar is a Variable that holds the GlobalOffsetTable address for Non-SFI

diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h
index 90df3de..20fd64f 100644 (file)
--- a/src/IceTargetLoweringX86BaseImpl.h
+++ b/src/IceTargetLoweringX86BaseImpl.h
@@ -325,8 +325,8 @@ TargetX86Base<TraitsType>::TargetX86Base(Cfg *Func)
 
 template <typename TraitsType>
 void TargetX86Base<TraitsType>::staticInit(GlobalContext *Ctx) {
-  Traits::initRegisterSet(Ctx->getFlags(), &TypeToRegisterSet, &RegisterAliases,
-                          &ScratchRegs);
+  Traits::initRegisterSet(Ctx->getFlags(), &TypeToRegisterSet,
+                          &RegisterAliases);
   filterTypeToRegisterSet(Ctx, Traits::RegisterSet::Reg_NUM,
                           TypeToRegisterSet.data(), TypeToRegisterSet.size(),
                           Traits::getRegName);