OMAPDSS: DISPC: Add MFLAG defines

OMAP5 has MFLAG feature in DISPC. Add the register definition and dump
it. The register is not used yet, though.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index d8f4aee..533539e 100644 (file)
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -3213,6 +3213,8 @@ static void dispc_dump_regs(struct seq_file *s)
                DUMPREG(DISPC_CONTROL3);
                DUMPREG(DISPC_CONFIG3);
        }
+       if (dss_has_feature(FEAT_MFLAG))
+               DUMPREG(DISPC_GLOBAL_MFLAG_ATTRIBUTE);
 
 #undef DUMPREG
 
@@ -3287,6 +3289,8 @@ static void dispc_dump_regs(struct seq_file *s)
                        DUMPREG(i, DISPC_OVL_ATTRIBUTES2);
                if (dss_has_feature(FEAT_PRELOAD))
                        DUMPREG(i, DISPC_OVL_PRELOAD);
+               if (dss_has_feature(FEAT_MFLAG))
+                       DUMPREG(i, DISPC_OVL_MFLAG_THRESHOLD);
        }
 
 #undef DISPC_REG

diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/omap2/dss/dispc.h
index de4863d..78edb44 100644 (file)
--- a/drivers/video/omap2/dss/dispc.h
+++ b/drivers/video/omap2/dss/dispc.h
@@ -40,6 +40,7 @@
 #define DISPC_CONTROL3                  0x0848
 #define DISPC_CONFIG3                   0x084C
 #define DISPC_MSTANDBY_CTRL            0x0858
+#define DISPC_GLOBAL_MFLAG_ATTRIBUTE   0x085C
 
 /* DISPC overlay registers */
 #define DISPC_OVL_BA0(n)               (DISPC_OVL_BASE(n) + \
@@ -100,6 +101,8 @@
                                        DISPC_FIR_COEF_V2_OFFSET(n, i))
 #define DISPC_OVL_PRELOAD(n)           (DISPC_OVL_BASE(n) + \
                                        DISPC_PRELOAD_OFFSET(n))
+#define DISPC_OVL_MFLAG_THRESHOLD(n)   (DISPC_OVL_BASE(n) + \
+                                       DISPC_MFLAG_THRESHOLD_OFFSET(n))
 
 /* DISPC up/downsampling FIR filter coefficient structure */
 struct dispc_coef {
@@ -894,4 +897,21 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane)
                return 0;
        }
 }
+
+static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane)
+{
+       switch (plane) {
+       case OMAP_DSS_GFX:
+               return 0x0860;
+       case OMAP_DSS_VIDEO1:
+               return 0x0864;
+       case OMAP_DSS_VIDEO2:
+               return 0x0868;
+       case OMAP_DSS_VIDEO3:
+               return 0x086c;
+       default:
+               BUG();
+               return 0;
+       }
+}
 #endif

diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index f8fd6db..7f89691 100644 (file)
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -613,6 +613,7 @@ static const enum dss_feat_id omap5_dss_feat_list[] = {
        FEAT_DSI_PLL_SELFREQDCO,
        FEAT_DSI_PLL_REFSEL,
        FEAT_DSI_PHY_DCC,
+       FEAT_MFLAG,
 };
 
 /* OMAP2 DSS Features */

diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index 10b0556..e3ef3b7 100644 (file)
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -64,6 +64,7 @@ enum dss_feat_id {
        FEAT_DSI_PLL_SELFREQDCO,
        FEAT_DSI_PLL_REFSEL,
        FEAT_DSI_PHY_DCC,
+       FEAT_MFLAG,
 };
 
 /* DSS register field id */