drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled

MP1 cannot access clock IP during MP1 FW reload, disable PLL
shutdown as a workaround.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index af4b07a..2466c2a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -383,10 +383,14 @@ static int navi10_append_powerplay_table(struct smu_context *smu)
        /* Mvdd Svi2 Div Ratio Setting */
        smc_pptable->MvddRatio = smc_dpm_table->MvddRatio;
 
-       if (adev->pm.pp_feature & PP_GFXOFF_MASK)
+       if (adev->pm.pp_feature & PP_GFXOFF_MASK) {
                *(uint64_t *)smc_pptable->FeaturesToRun |= FEATURE_MASK(FEATURE_GFX_SS_BIT)
                                        | FEATURE_MASK(FEATURE_GFXOFF_BIT);
 
+               /* TODO: remove it once SMU fw fix it */
+               smc_pptable->DebugOverrides |= DPM_OVERRIDE_DISABLE_DFLL_PLL_SHUTDOWN;
+       }
+
        return 0;
 }