uint32_t numintrs;
uint32_t numslots;
uint32_t flags;
+ uint32_t max_pstreams_mask;
/* Operational Registers */
uint32_t usbcmd;
XHCI_FLAG_USE_MSI_X,
XHCI_FLAG_SS_FIRST,
XHCI_FLAG_FORCE_PCIE_ENDCAP,
+ XHCI_FLAG_ENABLE_STREAMS,
};
static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
epctx->pctx = pctx;
epctx->max_psize = ctx[1]>>16;
epctx->max_psize *= 1+((ctx[1]>>8)&0xff);
- epctx->max_pstreams = (ctx[0] >> 10) & 0xf;
+ epctx->max_pstreams = (ctx[0] >> 10) & epctx->xhci->max_pstreams_mask;
epctx->lsa = (ctx[0] >> 15) & 1;
if (epctx->max_pstreams) {
xhci_alloc_streams(epctx, dequeue);
break;
case 0x10: /* HCCPARAMS */
if (sizeof(dma_addr_t) == 4) {
- ret = 0x00087000;
+ ret = 0x00080000 | (xhci->max_pstreams_mask << 12);
} else {
- ret = 0x00087001;
+ ret = 0x00080001 | (xhci->max_pstreams_mask << 12);
}
break;
case 0x14: /* DBOFF */
if (xhci->numslots < 1) {
xhci->numslots = 1;
}
+ if (xhci_get_flag(xhci, XHCI_FLAG_ENABLE_STREAMS)) {
+ xhci->max_pstreams_mask = 7; /* == 256 primary streams */
+ } else {
+ xhci->max_pstreams_mask = 0;
+ }
xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, xhci);
XHCIState, flags, XHCI_FLAG_SS_FIRST, true),
DEFINE_PROP_BIT("force-pcie-endcap", XHCIState, flags,
XHCI_FLAG_FORCE_PCIE_ENDCAP, false),
+ DEFINE_PROP_BIT("streams", XHCIState, flags,
+ XHCI_FLAG_ENABLE_STREAMS, true),
DEFINE_PROP_UINT32("intrs", XHCIState, numintrs, MAXINTRS),
DEFINE_PROP_UINT32("slots", XHCIState, numslots, MAXSLOTS),
DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4),