RDMA/hns: Use new interface to write DB related fields

Use hr_write_reg() instead of roce_set_field().

Link: https://lore.kernel.org/r/1624262443-24528-9-git-send-email-liweihang@huawei.com
Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 868a902..6358567 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -639,17 +639,10 @@ static inline void update_sq_db(struct hns_roce_dev *hr_dev,
        } else {
                struct hns_roce_v2_db sq_db = {};
 
-               roce_set_field(sq_db.byte_4, V2_DB_TAG_M, V2_DB_TAG_S,
-                              qp->doorbell_qpn);
-               roce_set_field(sq_db.byte_4, V2_DB_CMD_M, V2_DB_CMD_S,
-                              HNS_ROCE_V2_SQ_DB);
-
-               /* indicates data on new BAR, 0 : SQ doorbell, 1 : DWQE */
-               roce_set_bit(sq_db.byte_4, V2_DB_FLAG_S, 0);
-               roce_set_field(sq_db.parameter, V2_DB_PRODUCER_IDX_M,
-                              V2_DB_PRODUCER_IDX_S, qp->sq.head);
-               roce_set_field(sq_db.parameter, V2_DB_SL_M, V2_DB_SL_S,
-                              qp->sl);
+               hr_reg_write(&sq_db, DB_TAG, qp->doorbell_qpn);
+               hr_reg_write(&sq_db, DB_CMD, HNS_ROCE_V2_SQ_DB);
+               hr_reg_write(&sq_db, DB_PI, qp->sq.head);
+               hr_reg_write(&sq_db, DB_SL, qp->sl);
 
                hns_roce_write64(hr_dev, (__le32 *)&sq_db, qp->sq.db_reg);
        }
@@ -677,12 +670,9 @@ static inline void update_rq_db(struct hns_roce_dev *hr_dev,
                } else {
                        struct hns_roce_v2_db rq_db = {};
 
-                       roce_set_field(rq_db.byte_4, V2_DB_TAG_M, V2_DB_TAG_S,
-                                      qp->qpn);
-                       roce_set_field(rq_db.byte_4, V2_DB_CMD_M, V2_DB_CMD_S,
-                                      HNS_ROCE_V2_RQ_DB);
-                       roce_set_field(rq_db.parameter, V2_DB_PRODUCER_IDX_M,
-                                      V2_DB_PRODUCER_IDX_S, qp->rq.head);
+                       hr_reg_write(&rq_db, DB_TAG, qp->qpn);
+                       hr_reg_write(&rq_db, DB_CMD, HNS_ROCE_V2_RQ_DB);
+                       hr_reg_write(&rq_db, DB_PI, qp->rq.head);
 
                        hns_roce_write64(hr_dev, (__le32 *)&rq_db,
                                         qp->rq.db_reg);
@@ -999,6 +989,13 @@ static void fill_wqe_idx(struct hns_roce_srq *srq, unsigned int wqe_idx)
        idx_que->head++;
 }
 
+static void update_srq_db(struct hns_roce_v2_db *db, struct hns_roce_srq *srq)
+{
+       hr_reg_write(db, DB_TAG, srq->srqn);
+       hr_reg_write(db, DB_CMD, HNS_ROCE_V2_SRQ_DB);
+       hr_reg_write(db, DB_PI, srq->idx_que.head);
+}
+
 static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq,
                                     const struct ib_recv_wr *wr,
                                     const struct ib_recv_wr **bad_wr)
@@ -1036,12 +1033,7 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq,
        }
 
        if (likely(nreq)) {
-               roce_set_field(srq_db.byte_4, V2_DB_TAG_M, V2_DB_TAG_S,
-                              srq->srqn);
-               roce_set_field(srq_db.byte_4, V2_DB_CMD_M, V2_DB_CMD_S,
-                              HNS_ROCE_V2_SRQ_DB);
-               roce_set_field(srq_db.parameter, V2_DB_PRODUCER_IDX_M,
-                              V2_DB_PRODUCER_IDX_S, srq->idx_que.head);
+               update_srq_db(&srq_db, srq);
 
                hns_roce_write64(hr_dev, (__le32 *)&srq_db, srq->db_reg);
        }
@@ -3292,14 +3284,10 @@ static inline void update_cq_db(struct hns_roce_dev *hr_dev,
        } else {
                struct hns_roce_v2_db cq_db = {};
 
-               roce_set_field(cq_db.byte_4, V2_DB_TAG_M, V2_DB_TAG_S,
-                              hr_cq->cqn);
-               roce_set_field(cq_db.byte_4, V2_DB_CMD_M, V2_DB_CMD_S,
-                              HNS_ROCE_V2_CQ_DB);
-               roce_set_field(cq_db.parameter, V2_CQ_DB_CONS_IDX_M,
-                              V2_CQ_DB_CONS_IDX_S, hr_cq->cons_index);
-               roce_set_field(cq_db.parameter, V2_CQ_DB_CMD_SN_M,
-                              V2_CQ_DB_CMD_SN_S, 1);
+               hr_reg_write(&cq_db, DB_TAG, hr_cq->cqn);
+               hr_reg_write(&cq_db, DB_CMD, HNS_ROCE_V2_CQ_DB);
+               hr_reg_write(&cq_db, DB_CQ_CI, hr_cq->cons_index);
+               hr_reg_write(&cq_db, DB_CQ_CMD_SN, 1);
 
                hns_roce_write64(hr_dev, (__le32 *)&cq_db, hr_cq->db_reg);
        }
@@ -3420,14 +3408,11 @@ static int hns_roce_v2_req_notify_cq(struct ib_cq *ibcq,
        notify_flag = (flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ?
                      V2_CQ_DB_REQ_NOT : V2_CQ_DB_REQ_NOT_SOL;
 
-       roce_set_field(cq_db.byte_4, V2_DB_TAG_M, V2_DB_TAG_S, hr_cq->cqn);
-       roce_set_field(cq_db.byte_4, V2_DB_CMD_M, V2_DB_CMD_S,
-                      HNS_ROCE_V2_CQ_DB_NOTIFY);
-       roce_set_field(cq_db.parameter, V2_CQ_DB_CONS_IDX_M,
-                      V2_CQ_DB_CONS_IDX_S, hr_cq->cons_index);
-       roce_set_field(cq_db.parameter, V2_CQ_DB_CMD_SN_M,
-                      V2_CQ_DB_CMD_SN_S, hr_cq->arm_sn);
-       roce_set_bit(cq_db.parameter, V2_CQ_DB_NOTIFY_TYPE_S, notify_flag);
+       hr_reg_write(&cq_db, DB_TAG, hr_cq->cqn);
+       hr_reg_write(&cq_db, DB_CMD, HNS_ROCE_V2_CQ_DB_NOTIFY);
+       hr_reg_write(&cq_db, DB_CQ_CI, hr_cq->cons_index);
+       hr_reg_write(&cq_db, DB_CQ_CMD_SN, hr_cq->arm_sn);
+       hr_reg_write(&cq_db, DB_CQ_NOTIFY, notify_flag);
 
        hns_roce_write64(hr_dev, (__le32 *)&cq_db, hr_cq->db_reg);
 
@@ -5646,22 +5631,20 @@ static void update_eq_db(struct hns_roce_eq *eq)
        struct hns_roce_v2_db eq_db = {};
 
        if (eq->type_flag == HNS_ROCE_AEQ) {
-               roce_set_field(eq_db.byte_4, V2_EQ_DB_CMD_M, V2_EQ_DB_CMD_S,
-                              eq->arm_st == HNS_ROCE_V2_EQ_ALWAYS_ARMED ?
-                              HNS_ROCE_EQ_DB_CMD_AEQ :
-                              HNS_ROCE_EQ_DB_CMD_AEQ_ARMED);
+               hr_reg_write(&eq_db, EQ_DB_CMD,
+                            eq->arm_st == HNS_ROCE_V2_EQ_ALWAYS_ARMED ?
+                            HNS_ROCE_EQ_DB_CMD_AEQ :
+                            HNS_ROCE_EQ_DB_CMD_AEQ_ARMED);
        } else {
-               roce_set_field(eq_db.byte_4, V2_EQ_DB_TAG_M, V2_EQ_DB_TAG_S,
-                              eq->eqn);
+               hr_reg_write(&eq_db, EQ_DB_TAG, eq->eqn);
 
-               roce_set_field(eq_db.byte_4, V2_EQ_DB_CMD_M, V2_EQ_DB_CMD_S,
-                              eq->arm_st == HNS_ROCE_V2_EQ_ALWAYS_ARMED ?
-                              HNS_ROCE_EQ_DB_CMD_CEQ :
-                              HNS_ROCE_EQ_DB_CMD_CEQ_ARMED);
+               hr_reg_write(&eq_db, EQ_DB_CMD,
+                            eq->arm_st == HNS_ROCE_V2_EQ_ALWAYS_ARMED ?
+                            HNS_ROCE_EQ_DB_CMD_CEQ :
+                            HNS_ROCE_EQ_DB_CMD_CEQ_ARMED);
        }
 
-       roce_set_field(eq_db.parameter, V2_EQ_DB_CONS_IDX_M,
-                      V2_EQ_DB_CONS_IDX_S, eq->cons_index);
+       hr_reg_write(&eq_db, EQ_DB_CI, eq->cons_index);
 
        hns_roce_write64(hr_dev, (__le32 *)&eq_db, eq->db_reg);
 }

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index e6880a9..b25212a 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -945,28 +945,30 @@ struct hns_roce_v2_mpt_entry {
 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_S 28
 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_M GENMASK(31, 28)
 
-#define V2_DB_TAG_S 0
-#define V2_DB_TAG_M GENMASK(23, 0)
+struct hns_roce_v2_db {
+       __le32  data[2];
+};
 
-#define V2_DB_CMD_S 24
-#define V2_DB_CMD_M GENMASK(27, 24)
+#define DB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_db, h, l)
 
-#define V2_DB_FLAG_S 31
+#define DB_TAG DB_FIELD_LOC(23, 0)
+#define DB_CMD DB_FIELD_LOC(27, 24)
+#define DB_FLAG DB_FIELD_LOC(31, 31)
+#define DB_PI DB_FIELD_LOC(47, 32)
+#define DB_SL DB_FIELD_LOC(50, 48)
+#define DB_CQ_CI DB_FIELD_LOC(55, 32)
+#define DB_CQ_NOTIFY DB_FIELD_LOC(56, 56)
+#define DB_CQ_CMD_SN DB_FIELD_LOC(58, 57)
+#define EQ_DB_TAG DB_FIELD_LOC(7, 0)
+#define EQ_DB_CMD DB_FIELD_LOC(17, 16)
+#define EQ_DB_CI DB_FIELD_LOC(55, 32)
 
 #define V2_DB_PRODUCER_IDX_S 0
 #define V2_DB_PRODUCER_IDX_M GENMASK(15, 0)
 
-#define V2_DB_SL_S 16
-#define V2_DB_SL_M GENMASK(18, 16)
-
 #define V2_CQ_DB_CONS_IDX_S 0
 #define V2_CQ_DB_CONS_IDX_M GENMASK(23, 0)
 
-#define V2_CQ_DB_NOTIFY_TYPE_S 24
-
-#define V2_CQ_DB_CMD_SN_S 25
-#define V2_CQ_DB_CMD_SN_M GENMASK(26, 25)
-
 struct hns_roce_v2_ud_send_wqe {
        __le32  byte_4;
        __le32  msg_len;
@@ -1101,11 +1103,6 @@ struct hns_roce_v2_wqe_data_seg {
        __le64    addr;
 };
 
-struct hns_roce_v2_db {
-       __le32  byte_4;
-       __le32  parameter;
-};
-
 struct hns_roce_query_version {
        __le16 rocee_vendor_id;
        __le16 rocee_hw_version;
@@ -1638,15 +1635,6 @@ struct hns_roce_dip {
 #define HNS_ROCE_V2_AEQE_SUB_TYPE_S 8
 #define HNS_ROCE_V2_AEQE_SUB_TYPE_M GENMASK(15, 8)
 
-#define V2_EQ_DB_TAG_S 0
-#define V2_EQ_DB_TAG_M GENMASK(7, 0)
-
-#define V2_EQ_DB_CMD_S 16
-#define V2_EQ_DB_CMD_M GENMASK(17, 16)
-
-#define V2_EQ_DB_CONS_IDX_S 0
-#define V2_EQ_DB_CONS_IDX_M GENMASK(23, 0)
-
 #define HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S 0
 #define HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M GENMASK(23, 0)