vstart_event_id = -1;
nmi_event_id = -1;
sync_event_id = -1;
+
+ memset(gvram, 0x00, sizeof(gvram) * sizeof(uint8));
#if defined(_FM77AV_VARIANTS)
display_page = 0;
active_page = 0;
mainio->write_signal(FM7_MAINIO_SUB_BUSY, 0xff, 0xff);
firq_mask = false;
key_firq_req = false; //firq_mask = true;
- register_event(this, EVENT_FM7SUB_PROC, 8.0, true, &sync_event_id); // 2uS / 8MHz
-// register_event_by_clock(this, EVENT_FM7SUB_PROC, 8, false, NULL); // 1uS / 8MHz
+ register_event(this, EVENT_FM7SUB_PROC, 50.0, true, &sync_event_id); // 2uS / 8MHz
// subcpu->reset();
}
uint32 offset;
register uint32 rgbmask;
- //printf("%d\n", SDL_GetTicks());
if(!vram_wrote) return;
vram_wrote = false;
if((display_mode == DISPLAY_MODE_8_400L) || (display_mode == DISPLAY_MODE_8_400L_TEXT)) {
mainmem->reset();
memset(io_w_latch, 0x00, 0x100);
sub_busy = (read_signal(SIG_DISPLAY_BUSY) == 0) ? false : true;
- register_event(this, EVENT_FM7SUB_PROC, 8.0, true, &event_sync); // 2uS / 8MHz
+ register_event(this, EVENT_FM7SUB_PROC, 50.0, true, &event_sync); // 2uS / 8MHz
//maincpu->reset();
}