net: qed: Disable aRFS for NPAR and 100G

In CMT and NPAR the PF is unknown when the GFS block processes the
packet. Therefore cannot use searcher as it has a per PF database,
and thus ARFS must be disabled.

Fixes: d51e4af5c209 ("qed: aRFS infrastructure support")
Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com>
Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c
index b8f076e..3db181f 100644 (file)
--- a/drivers/net/ethernet/qlogic/qed/qed_dev.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_dev.c
@@ -4253,7 +4253,8 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
                        cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) |
                                        BIT(QED_MF_LLH_PROTO_CLSS) |
                                        BIT(QED_MF_LL2_NON_UNICAST) |
-                                       BIT(QED_MF_INTER_PF_SWITCH);
+                                       BIT(QED_MF_INTER_PF_SWITCH) |
+                                       BIT(QED_MF_DISABLE_ARFS);
                        break;
                case NVM_CFG1_GLOB_MF_MODE_DEFAULT:
                        cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) |
@@ -4266,6 +4267,14 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 
                DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n",
                        cdev->mf_bits);
+
+               /* In CMT the PF is unknown when the GFS block processes the
+                * packet. Therefore cannot use searcher as it has a per PF
+                * database, and thus ARFS must be disabled.
+                *
+                */
+               if (QED_IS_CMT(cdev))
+                       cdev->mf_bits |= BIT(QED_MF_DISABLE_ARFS);
        }
 
        DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n",

diff --git a/drivers/net/ethernet/qlogic/qed/qed_l2.c b/drivers/net/ethernet/qlogic/qed/qed_l2.c
index 4c6ac88..07824bf 100644 (file)
--- a/drivers/net/ethernet/qlogic/qed/qed_l2.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_l2.c
@@ -1980,6 +1980,9 @@ void qed_arfs_mode_configure(struct qed_hwfn *p_hwfn,
                             struct qed_ptt *p_ptt,
                             struct qed_arfs_config_params *p_cfg_params)
 {
+       if (test_bit(QED_MF_DISABLE_ARFS, &p_hwfn->cdev->mf_bits))
+               return;
+
        if (p_cfg_params->mode != QED_FILTER_CONFIG_MODE_DISABLE) {
                qed_gft_config(p_hwfn, p_ptt, p_hwfn->rel_pf_id,
                               p_cfg_params->tcp,

diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c
index f39f629..50e5eb2 100644 (file)
--- a/drivers/net/ethernet/qlogic/qed/qed_main.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_main.c
@@ -444,6 +444,8 @@ int qed_fill_dev_info(struct qed_dev *cdev,
                dev_info->fw_eng = FW_ENGINEERING_VERSION;
                dev_info->b_inter_pf_switch = test_bit(QED_MF_INTER_PF_SWITCH,
                                                       &cdev->mf_bits);
+               if (!test_bit(QED_MF_DISABLE_ARFS, &cdev->mf_bits))
+                       dev_info->b_arfs_capable = true;
                dev_info->tx_switching = true;
 
                if (hw_info->b_wol_support == QED_WOL_SUPPORT_PME)

diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h
index cd6a5c7..cdd73af 100644 (file)
--- a/include/linux/qed/qed_if.h
+++ b/include/linux/qed/qed_if.h
@@ -623,6 +623,7 @@ struct qed_dev_info {
 #define QED_MFW_VERSION_3_OFFSET       24
 
        u32             flash_size;
+       bool            b_arfs_capable;
        bool            b_inter_pf_switch;
        bool            tx_switching;
        bool            rdma_supported;