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ARM: sunxi: Add the Allwinner A31 compatible to the machine definition
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Sun, 10 Mar 2013 14:56:30 +0000 (15:56 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 16 Aug 2013 21:19:24 +0000 (23:19 +0200)
The Allwinner A31 is a quad-Cortex-A7 based SoC, which shares a lot of
IPs with the previous SoCs from Allwinner, like the PIO, I2C, UARTs,
timers, watchdog IPs, but also differs by dropping the WEMAC ethernet
controller and most notably dropping the in-house IRQ controller in
favor of a ARM GIC one.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/mach-sunxi/Kconfig
arch/arm/mach-sunxi/sunxi.c

index 5b045e3..3ab2f65 100644 (file)
@@ -10,3 +10,5 @@ config ARCH_SUNXI
        select SPARSE_IRQ
        select SUN4I_TIMER
        select PINCTRL_SUNXI
+       select ARM_GIC
+       select HAVE_SMP
index 38a3c55..11326d9 100644 (file)
@@ -96,6 +96,7 @@ static const char * const sunxi_board_dt_compat[] = {
        "allwinner,sun4i-a10",
        "allwinner,sun5i-a10s",
        "allwinner,sun5i-a13",
+       "allwinner,sun6i-a31",
        NULL,
 };