/* Copied from i386. Doesn't make much sense, because it will
only work for pci_alloc_coherent.
The caller just has to use GFP_DMA in this case. */
- if (mask < DMA_24BIT_MASK)
+ if (mask < DMA_BIT_MASK(24))
return 0;
/* Tell the device to use SAC when IOMMU force is on. This
dma_mask = dev->coherent_dma_mask;
if (!dma_mask)
- dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_BIT_MASK(32);
+ dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
return dma_mask;
}
{
unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
- if (dma_mask <= DMA_24BIT_MASK)
+ if (dma_mask <= DMA_BIT_MASK(24))
gfp |= GFP_DMA;
#ifdef CONFIG_X86_64
if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
/* Copied from i386. Doesn't make much sense, because it will
only work for pci_alloc_coherent.
The caller just has to use GFP_DMA in this case. */
- if (mask < DMA_24BIT_MASK)
+ if (mask < DMA_BIT_MASK(24))
return 0;
/* Tell the device to use SAC when IOMMU force is on. This
isa_dev->dev.release = isa_dev_release;
isa_dev->id = id;
- isa_dev->dev.coherent_dma_mask = DMA_24BIT_MASK;
+ isa_dev->dev.coherent_dma_mask = DMA_BIT_MASK(24);
isa_dev->dev.dma_mask = &isa_dev->dev.coherent_dma_mask;
error = device_register(&isa_dev->dev);
card->dev.parent = &card->protocol->dev;
dev_set_name(&card->dev, "%02x:%02x", card->protocol->number, card->number);
- card->dev.coherent_dma_mask = DMA_24BIT_MASK;
+ card->dev.coherent_dma_mask = DMA_BIT_MASK(24);
card->dev.dma_mask = &card->dev.coherent_dma_mask;
dev_id = pnp_add_card_id(card, pnpid);
INIT_LIST_HEAD(&dev->options);
dev->protocol = protocol;
dev->number = id;
- dev->dma_mask = DMA_24BIT_MASK;
+ dev->dma_mask = DMA_BIT_MASK(24);
dev->dev.parent = &dev->protocol->dev;
dev->dev.bus = &pnp_bus_type;
return err;
}
/* check, if we can restrict PCI DMA transfers to 24 bits */
- if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
- pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
+ if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
+ pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
pci_disable_device(pci);
return -ENXIO;
chip->irq = -1;
/* check if we can restrict PCI DMA transfers to 24 bits */
- if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
- pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
+ if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
+ pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
snd_printk(KERN_ERR "architecture does not support "
"24bit PCI busmaster DMA\n"
);
if ((err = pci_enable_device(pci)) < 0)
return err;
/* check, if we can restrict PCI DMA transfers to 24 bits */
- if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
- pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
+ if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
+ pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
pci_disable_device(pci);
return -ENXIO;
if ((err = pci_enable_device(pci)) < 0)
return err;
/* check, if we can restrict PCI DMA transfers to 24 bits */
- if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
- pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
+ if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
+ pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
pci_disable_device(pci);
return -ENXIO;