drm/radeon/sumo: implement get_current_sclk/mclk

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 63bbd66..2b72c4a 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1489,6 +1489,8 @@ static struct radeon_asic sumo_asic = {
                .print_power_state = &sumo_dpm_print_power_state,
                .debugfs_print_current_performance_level = &sumo_dpm_debugfs_print_current_performance_level,
                .force_performance_level = &sumo_dpm_force_performance_level,
+               .get_current_sclk = &sumo_dpm_get_current_sclk,
+               .get_current_mclk = &sumo_dpm_get_current_mclk,
        },
        .pflip = {
                .page_flip = &evergreen_page_flip,

diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index dd4f8bc..e2887eb 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -589,6 +589,8 @@ void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev
                                                      struct seq_file *m);
 int sumo_dpm_force_performance_level(struct radeon_device *rdev,
                                     enum radeon_dpm_forced_level level);
+u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev);
 
 /*
  * cayman

diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c
index 25fd4ce..cd08628 100644 (file)
--- a/drivers/gpu/drm/radeon/sumo_dpm.c
+++ b/drivers/gpu/drm/radeon/sumo_dpm.c
@@ -1837,6 +1837,34 @@ void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev
        }
 }
 
+u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+       struct radeon_ps *rps = &pi->current_rps;
+       struct sumo_ps *ps = sumo_get_ps(rps);
+       struct sumo_pl *pl;
+       u32 current_index =
+               (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_INDEX_MASK) >>
+               CURR_INDEX_SHIFT;
+
+       if (current_index == BOOST_DPM_LEVEL) {
+               pl = &pi->boost_pl;
+               return pl->sclk;
+       } else if (current_index >= ps->num_levels) {
+               return 0;
+       } else {
+               pl = &ps->levels[current_index];
+               return pl->sclk;
+       }
+}
+
+u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+
+       return pi->sys_info.bootup_uma_clk;
+}
+
 void sumo_dpm_fini(struct radeon_device *rdev)
 {
        int i;