[SLH] Regenerate tests with --no_x86_scrub_rip to restore the higher

fidelity checking of RIP-based references to basic blocks and other
labels.

These labels are super important for SLH tests so we should keep them
readable in the test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348373 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll b/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
index 10a48de..65bf1cb 100644 (file)
--- a/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
+++ b/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
@@ -62,7 +62,7 @@ define i32 @test_calls_and_rets(i32 *%ptr) nounwind {
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rax
 ; X64-NOPIC-MCM-NEXT:    movq -{{[0-9]+}}(%rsp), %rcx
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rax
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rdx
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr0(%rip), %rdx
 ; X64-NOPIC-MCM-NEXT:    cmpq %rdx, %rcx
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r14, %rax
 ; X64-NOPIC-MCM-NEXT:    movl (%rbx), %ebp
@@ -73,7 +73,7 @@ define i32 @test_calls_and_rets(i32 *%ptr) nounwind {
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rcx
 ; X64-NOPIC-MCM-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rcx
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rdx
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr1(%rip), %rdx
 ; X64-NOPIC-MCM-NEXT:    cmpq %rdx, %rax
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r14, %rcx
 ; X64-NOPIC-MCM-NEXT:    addl (%rbx), %ebp
@@ -102,7 +102,7 @@ define i32 @test_calls_and_rets(i32 *%ptr) nounwind {
 ; X64-PIC-NEXT:    movq %rsp, %rax
 ; X64-PIC-NEXT:    movq -{{[0-9]+}}(%rsp), %rcx
 ; X64-PIC-NEXT:    sarq $63, %rax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rdx
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr0(%rip), %rdx
 ; X64-PIC-NEXT:    cmpq %rdx, %rcx
 ; X64-PIC-NEXT:    cmovneq %r14, %rax
 ; X64-PIC-NEXT:    movl (%rbx), %ebp
@@ -113,7 +113,7 @@ define i32 @test_calls_and_rets(i32 *%ptr) nounwind {
 ; X64-PIC-NEXT:    movq %rsp, %rcx
 ; X64-PIC-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
 ; X64-PIC-NEXT:    sarq $63, %rcx
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rdx
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr1(%rip), %rdx
 ; X64-PIC-NEXT:    cmpq %rdx, %rax
 ; X64-PIC-NEXT:    cmovneq %r14, %rcx
 ; X64-PIC-NEXT:    addl (%rbx), %ebp
@@ -190,23 +190,23 @@ define i32 @test_calls_and_rets_noredzone(i32 *%ptr) nounwind noredzone {
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rax
 ; X64-NOPIC-MCM-NEXT:    shlq $47, %rax
 ; X64-NOPIC-MCM-NEXT:    orq %rax, %rsp
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rbp
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr2(%rip), %rbp
 ; X64-NOPIC-MCM-NEXT:    callq f
 ; X64-NOPIC-MCM-NEXT:  .Lslh_ret_addr2:
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rax
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rax
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr2(%rip), %rcx
 ; X64-NOPIC-MCM-NEXT:    cmpq %rcx, %rbp
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r14, %rax
 ; X64-NOPIC-MCM-NEXT:    movl (%rbx), %ebp
 ; X64-NOPIC-MCM-NEXT:    shlq $47, %rax
 ; X64-NOPIC-MCM-NEXT:    orq %rax, %rsp
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %r15
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr3(%rip), %r15
 ; X64-NOPIC-MCM-NEXT:    callq f
 ; X64-NOPIC-MCM-NEXT:  .Lslh_ret_addr3:
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rcx
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rcx
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rax
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr3(%rip), %rax
 ; X64-NOPIC-MCM-NEXT:    cmpq %rax, %r15
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r14, %rcx
 ; X64-NOPIC-MCM-NEXT:    addl (%rbx), %ebp
@@ -234,23 +234,23 @@ define i32 @test_calls_and_rets_noredzone(i32 *%ptr) nounwind noredzone {
 ; X64-PIC-NEXT:    sarq $63, %rax
 ; X64-PIC-NEXT:    shlq $47, %rax
 ; X64-PIC-NEXT:    orq %rax, %rsp
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rbp
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr2(%rip), %rbp
 ; X64-PIC-NEXT:    callq f@PLT
 ; X64-PIC-NEXT:  .Lslh_ret_addr2:
 ; X64-PIC-NEXT:    movq %rsp, %rax
 ; X64-PIC-NEXT:    sarq $63, %rax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr2(%rip), %rcx
 ; X64-PIC-NEXT:    cmpq %rcx, %rbp
 ; X64-PIC-NEXT:    cmovneq %r14, %rax
 ; X64-PIC-NEXT:    movl (%rbx), %ebp
 ; X64-PIC-NEXT:    shlq $47, %rax
 ; X64-PIC-NEXT:    orq %rax, %rsp
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %r15
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr3(%rip), %r15
 ; X64-PIC-NEXT:    callq f@PLT
 ; X64-PIC-NEXT:  .Lslh_ret_addr3:
 ; X64-PIC-NEXT:    movq %rsp, %rcx
 ; X64-PIC-NEXT:    sarq $63, %rcx
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rax
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr3(%rip), %rax
 ; X64-PIC-NEXT:    cmpq %rax, %r15
 ; X64-PIC-NEXT:    cmovneq %r14, %rcx
 ; X64-PIC-NEXT:    addl (%rbx), %ebp
@@ -355,12 +355,12 @@ define i32 @test_call_setjmp(i32 *%ptr) nounwind {
 ; X64-NOPIC-MCM-NEXT:    shlq $47, %rax
 ; X64-NOPIC-MCM-NEXT:    movq %r14, %rdi
 ; X64-NOPIC-MCM-NEXT:    orq %rax, %rsp
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rbp
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr4(%rip), %rbp
 ; X64-NOPIC-MCM-NEXT:    callq setjmp
 ; X64-NOPIC-MCM-NEXT:  .Lslh_ret_addr4:
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rax
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rax
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr4(%rip), %rcx
 ; X64-NOPIC-MCM-NEXT:    cmpq %rcx, %rbp
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r15, %rax
 ; X64-NOPIC-MCM-NEXT:    movl (%rbx), %ebp
@@ -368,12 +368,12 @@ define i32 @test_call_setjmp(i32 *%ptr) nounwind {
 ; X64-NOPIC-MCM-NEXT:    movq %r14, %rdi
 ; X64-NOPIC-MCM-NEXT:    movl $42, %esi
 ; X64-NOPIC-MCM-NEXT:    orq %rax, %rsp
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %r12
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr5(%rip), %r12
 ; X64-NOPIC-MCM-NEXT:    callq sigsetjmp
 ; X64-NOPIC-MCM-NEXT:  .Lslh_ret_addr5:
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rax
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rax
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr5(%rip), %rcx
 ; X64-NOPIC-MCM-NEXT:    cmpq %rcx, %r12
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r15, %rax
 ; X64-NOPIC-MCM-NEXT:    addl (%rbx), %ebp
@@ -382,12 +382,12 @@ define i32 @test_call_setjmp(i32 *%ptr) nounwind {
 ; X64-NOPIC-MCM-NEXT:    movq %r14, %rsi
 ; X64-NOPIC-MCM-NEXT:    movl $42, %edx
 ; X64-NOPIC-MCM-NEXT:    orq %rax, %rsp
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %r14
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr6(%rip), %r14
 ; X64-NOPIC-MCM-NEXT:    callq __sigsetjmp
 ; X64-NOPIC-MCM-NEXT:  .Lslh_ret_addr6:
 ; X64-NOPIC-MCM-NEXT:    movq %rsp, %rcx
 ; X64-NOPIC-MCM-NEXT:    sarq $63, %rcx
-; X64-NOPIC-MCM-NEXT:    leaq {{.*}}(%rip), %rax
+; X64-NOPIC-MCM-NEXT:    leaq .Lslh_ret_addr6(%rip), %rax
 ; X64-NOPIC-MCM-NEXT:    cmpq %rax, %r14
 ; X64-NOPIC-MCM-NEXT:    cmovneq %r15, %rcx
 ; X64-NOPIC-MCM-NEXT:    addl (%rbx), %ebp
@@ -419,12 +419,12 @@ define i32 @test_call_setjmp(i32 *%ptr) nounwind {
 ; X64-PIC-NEXT:    shlq $47, %rax
 ; X64-PIC-NEXT:    movq %r14, %rdi
 ; X64-PIC-NEXT:    orq %rax, %rsp
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rbp
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr4(%rip), %rbp
 ; X64-PIC-NEXT:    callq setjmp@PLT
 ; X64-PIC-NEXT:  .Lslh_ret_addr4:
 ; X64-PIC-NEXT:    movq %rsp, %rax
 ; X64-PIC-NEXT:    sarq $63, %rax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr4(%rip), %rcx
 ; X64-PIC-NEXT:    cmpq %rcx, %rbp
 ; X64-PIC-NEXT:    cmovneq %r15, %rax
 ; X64-PIC-NEXT:    movl (%rbx), %ebp
@@ -432,12 +432,12 @@ define i32 @test_call_setjmp(i32 *%ptr) nounwind {
 ; X64-PIC-NEXT:    movq %r14, %rdi
 ; X64-PIC-NEXT:    movl $42, %esi
 ; X64-PIC-NEXT:    orq %rax, %rsp
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %r12
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr5(%rip), %r12
 ; X64-PIC-NEXT:    callq sigsetjmp@PLT
 ; X64-PIC-NEXT:  .Lslh_ret_addr5:
 ; X64-PIC-NEXT:    movq %rsp, %rax
 ; X64-PIC-NEXT:    sarq $63, %rax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr5(%rip), %rcx
 ; X64-PIC-NEXT:    cmpq %rcx, %r12
 ; X64-PIC-NEXT:    cmovneq %r15, %rax
 ; X64-PIC-NEXT:    addl (%rbx), %ebp
@@ -446,12 +446,12 @@ define i32 @test_call_setjmp(i32 *%ptr) nounwind {
 ; X64-PIC-NEXT:    movq %r14, %rsi
 ; X64-PIC-NEXT:    movl $42, %edx
 ; X64-PIC-NEXT:    orq %rax, %rsp
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %r14
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr6(%rip), %r14
 ; X64-PIC-NEXT:    callq __sigsetjmp@PLT
 ; X64-PIC-NEXT:  .Lslh_ret_addr6:
 ; X64-PIC-NEXT:    movq %rsp, %rcx
 ; X64-PIC-NEXT:    sarq $63, %rcx
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rax
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr6(%rip), %rax
 ; X64-PIC-NEXT:    cmpq %rax, %r14
 ; X64-PIC-NEXT:    cmovneq %r15, %rcx
 ; X64-PIC-NEXT:    addl (%rbx), %ebp

diff --git a/test/CodeGen/X86/speculative-load-hardening-indirect.ll b/test/CodeGen/X86/speculative-load-hardening-indirect.ll
index ea0823c..81768a1 100644 (file)
--- a/test/CodeGen/X86/speculative-load-hardening-indirect.ll
+++ b/test/CodeGen/X86/speculative-load-hardening-indirect.ll
@@ -53,7 +53,7 @@ define i32 @test_indirect_call(i32 ()** %ptr) nounwind {
 ; X64-PIC-NEXT:    movq %rsp, %rcx
 ; X64-PIC-NEXT:    movq -{{[0-9]+}}(%rsp), %rdx
 ; X64-PIC-NEXT:    sarq $63, %rcx
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr0(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rbx, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -134,7 +134,7 @@ define i32 @test_indirect_call_global() nounwind {
 ; X64-NEXT:    movq %rsp, %rax
 ; X64-NEXT:    movq $-1, %rbx
 ; X64-NEXT:    sarq $63, %rax
-; X64-NEXT:    movq {{.*}}(%rip), %rcx
+; X64-NEXT:    movq global_fnptr(%rip), %rcx
 ; X64-NEXT:    orq %rax, %rcx
 ; X64-NEXT:    shlq $47, %rax
 ; X64-NEXT:    orq %rax, %rsp
@@ -156,7 +156,7 @@ define i32 @test_indirect_call_global() nounwind {
 ; X64-PIC-NEXT:    movq %rsp, %rax
 ; X64-PIC-NEXT:    movq $-1, %rbx
 ; X64-PIC-NEXT:    sarq $63, %rax
-; X64-PIC-NEXT:    movq global_fnptr@{{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    movq global_fnptr@GOTPCREL(%rip), %rcx
 ; X64-PIC-NEXT:    movq (%rcx), %rcx
 ; X64-PIC-NEXT:    orq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rax
@@ -166,7 +166,7 @@ define i32 @test_indirect_call_global() nounwind {
 ; X64-PIC-NEXT:    movq %rsp, %rcx
 ; X64-PIC-NEXT:    movq -{{[0-9]+}}(%rsp), %rdx
 ; X64-PIC-NEXT:    sarq $63, %rcx
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .Lslh_ret_addr1(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rbx, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -180,7 +180,7 @@ define i32 @test_indirect_call_global() nounwind {
 ; X64-RETPOLINE-NEXT:    movq %rsp, %rax
 ; X64-RETPOLINE-NEXT:    movq $-1, %rbx
 ; X64-RETPOLINE-NEXT:    sarq $63, %rax
-; X64-RETPOLINE-NEXT:    movq {{.*}}(%rip), %r11
+; X64-RETPOLINE-NEXT:    movq global_fnptr(%rip), %r11
 ; X64-RETPOLINE-NEXT:    shlq $47, %rax
 ; X64-RETPOLINE-NEXT:    orq %rax, %rsp
 ; X64-RETPOLINE-NEXT:    callq __llvm_retpoline_r11
@@ -206,7 +206,7 @@ define i32 @test_indirect_tail_call_global() nounwind {
 ; X64-NEXT:    movq %rsp, %rax
 ; X64-NEXT:    movq $-1, %rcx
 ; X64-NEXT:    sarq $63, %rax
-; X64-NEXT:    movq {{.*}}(%rip), %rcx
+; X64-NEXT:    movq global_fnptr(%rip), %rcx
 ; X64-NEXT:    orq %rax, %rcx
 ; X64-NEXT:    shlq $47, %rax
 ; X64-NEXT:    orq %rax, %rsp
@@ -217,7 +217,7 @@ define i32 @test_indirect_tail_call_global() nounwind {
 ; X64-PIC-NEXT:    movq %rsp, %rax
 ; X64-PIC-NEXT:    movq $-1, %rcx
 ; X64-PIC-NEXT:    sarq $63, %rax
-; X64-PIC-NEXT:    movq global_fnptr@{{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    movq global_fnptr@GOTPCREL(%rip), %rcx
 ; X64-PIC-NEXT:    movq (%rcx), %rcx
 ; X64-PIC-NEXT:    orq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rax
@@ -229,7 +229,7 @@ define i32 @test_indirect_tail_call_global() nounwind {
 ; X64-RETPOLINE-NEXT:    movq %rsp, %rax
 ; X64-RETPOLINE-NEXT:    movq $-1, %rcx
 ; X64-RETPOLINE-NEXT:    sarq $63, %rax
-; X64-RETPOLINE-NEXT:    movq {{.*}}(%rip), %r11
+; X64-RETPOLINE-NEXT:    movq global_fnptr(%rip), %r11
 ; X64-RETPOLINE-NEXT:    shlq $47, %rax
 ; X64-RETPOLINE-NEXT:    orq %rax, %rsp
 ; X64-RETPOLINE-NEXT:    jmp __llvm_retpoline_r11 # TAILCALL
@@ -286,7 +286,7 @@ define i32 @test_indirectbr(i8** %ptr) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rdx
 ; X64-PIC-NEXT:    jmpq *%rdx
 ; X64-PIC-NEXT:  .LBB4_1: # %bb0
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB4_1(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -294,7 +294,7 @@ define i32 @test_indirectbr(i8** %ptr) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rsp
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .LBB4_3: # %bb2
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB4_3(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -302,7 +302,7 @@ define i32 @test_indirectbr(i8** %ptr) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rsp
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .LBB4_4: # %bb3
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB4_4(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -310,7 +310,7 @@ define i32 @test_indirectbr(i8** %ptr) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rsp
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .LBB4_2: # %bb1
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB4_2(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -386,13 +386,13 @@ define i32 @test_indirectbr_global(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    movq $-1, %rax
 ; X64-PIC-NEXT:    sarq $63, %rcx
 ; X64-PIC-NEXT:    movslq %edi, %rdx
-; X64-PIC-NEXT:    movq global_blockaddrs@{{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    movq global_blockaddrs@GOTPCREL(%rip), %rsi
 ; X64-PIC-NEXT:    movq (%rsi,%rdx,8), %rdx
 ; X64-PIC-NEXT:    orq %rcx, %rdx
 ; X64-PIC-NEXT:    jmpq *%rdx
 ; X64-PIC-NEXT:  .Ltmp0: # Block address taken
 ; X64-PIC-NEXT:  .LBB5_1: # %bb0
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB5_1(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -401,7 +401,7 @@ define i32 @test_indirectbr_global(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .Ltmp1: # Block address taken
 ; X64-PIC-NEXT:  .LBB5_3: # %bb2
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB5_3(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -410,7 +410,7 @@ define i32 @test_indirectbr_global(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .Ltmp2: # Block address taken
 ; X64-PIC-NEXT:  .LBB5_4: # %bb3
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB5_4(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -419,7 +419,7 @@ define i32 @test_indirectbr_global(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .Ltmp3: # Block address taken
 ; X64-PIC-NEXT:  .LBB5_2: # %bb1
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB5_2(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -552,13 +552,13 @@ define i32 @test_switch_jumptable(i32 %idx) nounwind {
 ; X64-PIC-NEXT:  # %bb.1: # %entry
 ; X64-PIC-NEXT:    cmovaq %rax, %rcx
 ; X64-PIC-NEXT:    movl %edi, %edx
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LJTI6_0(%rip), %rsi
 ; X64-PIC-NEXT:    movslq (%rsi,%rdx,4), %rdx
 ; X64-PIC-NEXT:    addq %rsi, %rdx
 ; X64-PIC-NEXT:    orq %rcx, %rdx
 ; X64-PIC-NEXT:    jmpq *%rdx
 ; X64-PIC-NEXT:  .LBB6_3: # %bb1
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB6_3(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -572,7 +572,7 @@ define i32 @test_switch_jumptable(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rsp
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .LBB6_4: # %bb2
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB6_4(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -580,7 +580,7 @@ define i32 @test_switch_jumptable(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rsp
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .LBB6_5: # %bb3
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB6_5(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -588,7 +588,7 @@ define i32 @test_switch_jumptable(i32 %idx) nounwind {
 ; X64-PIC-NEXT:    orq %rcx, %rsp
 ; X64-PIC-NEXT:    retq
 ; X64-PIC-NEXT:  .LBB6_6: # %bb5
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB6_6(%rip), %rsi
 ; X64-PIC-NEXT:    cmpq %rsi, %rdx
 ; X64-PIC-NEXT:    cmovneq %rax, %rcx
 ; X64-PIC-NEXT:    shlq $47, %rcx
@@ -733,7 +733,7 @@ define i32 @test_switch_jumptable_fallthrough(i32 %idx, i32* %a.ptr, i32* %b.ptr
 ; X64-PIC-NEXT:    cmovaq %r10, %r9
 ; X64-PIC-NEXT:    xorl %eax, %eax
 ; X64-PIC-NEXT:    movl %edi, %esi
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rdi
+; X64-PIC-NEXT:    leaq .LJTI7_0(%rip), %rdi
 ; X64-PIC-NEXT:    movslq (%rdi,%rsi,4), %rsi
 ; X64-PIC-NEXT:    addq %rdi, %rsi
 ; X64-PIC-NEXT:    orq %r9, %rsi
@@ -742,30 +742,30 @@ define i32 @test_switch_jumptable_fallthrough(i32 %idx, i32* %a.ptr, i32* %b.ptr
 ; X64-PIC-NEXT:    cmovbeq %r10, %r9
 ; X64-PIC-NEXT:    movl (%rsi), %eax
 ; X64-PIC-NEXT:    orl %r9d, %eax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB7_3(%rip), %rsi
 ; X64-PIC-NEXT:  .LBB7_3: # %bb1
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rdi
+; X64-PIC-NEXT:    leaq .LBB7_3(%rip), %rdi
 ; X64-PIC-NEXT:    cmpq %rdi, %rsi
 ; X64-PIC-NEXT:    cmovneq %r10, %r9
 ; X64-PIC-NEXT:    addl (%rdx), %eax
 ; X64-PIC-NEXT:    orl %r9d, %eax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB7_4(%rip), %rsi
 ; X64-PIC-NEXT:  .LBB7_4: # %bb2
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rdx
+; X64-PIC-NEXT:    leaq .LBB7_4(%rip), %rdx
 ; X64-PIC-NEXT:    cmpq %rdx, %rsi
 ; X64-PIC-NEXT:    cmovneq %r10, %r9
 ; X64-PIC-NEXT:    addl (%rcx), %eax
 ; X64-PIC-NEXT:    orl %r9d, %eax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB7_5(%rip), %rsi
 ; X64-PIC-NEXT:  .LBB7_5: # %bb3
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    leaq .LBB7_5(%rip), %rcx
 ; X64-PIC-NEXT:    cmpq %rcx, %rsi
 ; X64-PIC-NEXT:    cmovneq %r10, %r9
 ; X64-PIC-NEXT:    addl (%r8), %eax
 ; X64-PIC-NEXT:    orl %r9d, %eax
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    leaq .LBB7_6(%rip), %rsi
 ; X64-PIC-NEXT:  .LBB7_6: # %bb4
-; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rcx
+; X64-PIC-NEXT:    leaq .LBB7_6(%rip), %rcx
 ; X64-PIC-NEXT:    cmpq %rcx, %rsi
 ; X64-PIC-NEXT:    cmovneq %r10, %r9
 ; X64-PIC-NEXT:    shlq $47, %r9