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spi: cadence-quadspi: Silence shiftTooManyBitsSigned warning
authorJay Fang <f.fangjian@huawei.com>
Thu, 4 Mar 2021 10:47:52 +0000 (18:47 +0800)
committerMark Brown <broonie@kernel.org>
Wed, 10 Mar 2021 12:47:01 +0000 (12:47 +0000)
drivers/spi/spi-cadence-quadspi.c:267:18: warning: Shifting signed 32-bit
value by 31 bits is undefined behaviour [shiftTooManyBitsSigned]
    return reg & (1 << CQSPI_REG_CONFIG_IDLE_LSB);
                    ^

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Link: https://lore.kernel.org/r/1614854872-8694-1-git-send-email-f.fangjian@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-cadence-quadspi.c

index 14a7120..e2d6ea8 100644 (file)
@@ -264,7 +264,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi)
 {
        u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
 
-       return reg & (1 << CQSPI_REG_CONFIG_IDLE_LSB);
+       return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB);
 }
 
 static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)