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drm/vc4: plane: Change LBM alignment constraint on LBM
authorDave Stevenson <dave.stevenson@raspberrypi.com>
Thu, 3 Sep 2020 08:00:36 +0000 (10:00 +0200)
committerMaxime Ripard <maxime@cerno.tech>
Mon, 7 Sep 2020 16:01:58 +0000 (18:01 +0200)
The HVS5 needs an alignment of 64bytes for its LBM memory, so let's reflect
it.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6f9c4fe1eb9258a3f1d0f21af6a99c42472ac531.1599120059.git-series.maxime@cerno.tech
drivers/gpu/drm/vc4/vc4_plane.c

index 20c949b..d0771eb 100644 (file)
@@ -578,7 +578,9 @@ static int vc4_plane_allocate_lbm(struct drm_plane_state *state)
                spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
                ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm,
                                                 &vc4_state->lbm,
-                                                lbm_size, 32, 0, 0);
+                                                lbm_size,
+                                                vc4->hvs->hvs5 ? 64 : 32,
+                                                0, 0);
                spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
 
                if (ret)