453 1 bit ENABLE_SGPR_FLAT_SCRATCH_INIT *see above*
454 1 bit ENABLE_SGPR_PRIVATE_SEGMENT *see above*
_SIZE
- 455 1 bit ENABLE_SGPR_GRID_WORKGROUP Not implemented in CP and
- _COUNT_X should always be 0.
- 456 1 bit ENABLE_SGPR_GRID_WORKGROUP Not implemented in CP and
- _COUNT_Y should always be 0.
- 457 1 bit ENABLE_SGPR_GRID_WORKGROUP Not implemented in CP and
- _COUNT_Z should always be 0.
- 463:458 6 bits Reserved, must be 0.
- 511:464 6 Reserved, must be 0.
- bytes
+ 455 1 bit Reserved, must be 0.
+ 511:456 8 bytes Reserved, must be 0.
512 **Total size 64 bytes.**
======= ====================================================================
KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_ID, 4, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_FLAT_SCRATCH_INIT, 5, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_SIZE, 6, 1),
- KERNEL_CODE_PROPERTY(ENABLE_SGPR_GRID_WORKGROUP_COUNT_X, 7, 1),
- KERNEL_CODE_PROPERTY(ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y, 8, 1),
- KERNEL_CODE_PROPERTY(ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z, 9, 1),
- KERNEL_CODE_PROPERTY(RESERVED, 10, 6),
+ KERNEL_CODE_PROPERTY(RESERVED, 7, 9),
};
#undef KERNEL_CODE_PROPERTY
<< " DispatchID: " << FI.second.DispatchID
<< " FlatScratchInit: " << FI.second.FlatScratchInit
<< " PrivateSegmentSize: " << FI.second.PrivateSegmentSize
- << " GridWorkgroupCountX: " << FI.second.GridWorkGroupCountX
- << " GridWorkgroupCountY: " << FI.second.GridWorkGroupCountY
- << " GridWorkgroupCountZ: " << FI.second.GridWorkGroupCountZ
<< " WorkGroupIDX: " << FI.second.WorkGroupIDX
<< " WorkGroupIDY: " << FI.second.WorkGroupIDY
<< " WorkGroupIDZ: " << FI.second.WorkGroupIDZ
ArgDescriptor DispatchID;
ArgDescriptor FlatScratchInit;
ArgDescriptor PrivateSegmentSize;
- ArgDescriptor GridWorkGroupCountX;
- ArgDescriptor GridWorkGroupCountY;
- ArgDescriptor GridWorkGroupCountZ;
// System SGPRs in kernels.
ArgDescriptor WorkGroupIDX;
KernelCodeProperties |=
amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT;
}
- if (MFI.hasGridWorkgroupCountX()) {
- KernelCodeProperties |=
- amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X;
- }
- if (MFI.hasGridWorkgroupCountY()) {
- KernelCodeProperties |=
- amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y;
- }
- if (MFI.hasGridWorkgroupCountZ()) {
- KernelCodeProperties |=
- amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z;
- }
return KernelCodeProperties;
}
if (MFI->hasFlatScratchInit())
Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT;
- if (MFI->hasGridWorkgroupCountX()) {
- Out.code_properties |=
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X;
- }
-
- if (MFI->hasGridWorkgroupCountY()) {
- Out.code_properties |=
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y;
- }
-
- if (MFI->hasGridWorkgroupCountZ()) {
- Out.code_properties |=
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z;
- }
-
if (MFI->hasDispatchPtr())
Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR;
KernargSegmentPtr(false),
DispatchID(false),
FlatScratchInit(false),
- GridWorkgroupCountX(false),
- GridWorkgroupCountY(false),
- GridWorkgroupCountZ(false),
WorkGroupIDX(false),
WorkGroupIDY(false),
WorkGroupIDZ(false),
bool KernargSegmentPtr : 1;
bool DispatchID : 1;
bool FlatScratchInit : 1;
- bool GridWorkgroupCountX : 1;
- bool GridWorkgroupCountY : 1;
- bool GridWorkgroupCountZ : 1;
// Feature bits required for inputs passed in system SGPRs.
bool WorkGroupIDX : 1; // Always initialized.
return FlatScratchInit;
}
- bool hasGridWorkgroupCountX() const {
- return GridWorkgroupCountX;
- }
-
- bool hasGridWorkgroupCountY() const {
- return GridWorkgroupCountY;
- }
-
- bool hasGridWorkgroupCountZ() const {
- return GridWorkgroupCountZ;
- }
-
bool hasWorkGroupIDX() const {
return WorkGroupIDX;
}