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PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags
authorThomas Petazzoni <thomas.petazzoni@bootlin.com>
Wed, 20 Feb 2019 09:48:41 +0000 (10:48 +0100)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 22 Feb 2019 10:51:14 +0000 (10:51 +0000)
Depending on the capabilities of the PCI controller/platform, the
PCI-to-PCI bridge emulation behavior might need to be different. For
example, on platforms that use the pci-mvebu code, we currently don't
support prefetchable memory BARs, so the corresponding fields in the
PCI-to-PCI bridge configuration space should be read-only.

To implement this, extend pci_bridge_emul_init() to take a "flags"
argument, with currently one flag supported:

PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR

that will make the prefetchable memory base and limit registers
read-only.

The pci-mvebu and pci-aardvark drivers are updated accordingly.

Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Reported-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Luis Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Cc: Luís Mendes <luis.p.mendes@gmail.com>
Cc: Leigh Brown <leigh@solinno.co.uk>
drivers/pci/controller/pci-aardvark.c
drivers/pci/controller/pci-mvebu.c
drivers/pci/pci-bridge-emul.c
drivers/pci/pci-bridge-emul.h

index 750081c..6eecae4 100644 (file)
@@ -499,7 +499,7 @@ static void advk_sw_pci_bridge_init(struct advk_pcie *pcie)
        bridge->data = pcie;
        bridge->ops = &advk_pci_bridge_emul_ops;
 
-       pci_bridge_emul_init(bridge);
+       pci_bridge_emul_init(bridge, 0);
 
 }
 
index fa0fc46..d3a0419 100644 (file)
@@ -583,7 +583,7 @@ static void mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
        bridge->data = port;
        bridge->ops = &mvebu_pci_bridge_emul_ops;
 
-       pci_bridge_emul_init(bridge);
+       pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR);
 }
 
 static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys)
index dd8d806..83fb077 100644 (file)
@@ -267,7 +267,8 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
  * (typically at least vendor, device, revision), the ->ops pointer,
  * and optionally ->data and ->has_pcie.
  */
-int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
+int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
+                        unsigned int flags)
 {
        bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
        bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
@@ -295,6 +296,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
                }
        }
 
+       if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
+               bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
+               bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
+       }
+
        return 0;
 }
 
index f04637b..e65b1b7 100644 (file)
@@ -119,7 +119,12 @@ struct pci_bridge_emul {
        bool has_pcie;
 };
 
-int pci_bridge_emul_init(struct pci_bridge_emul *bridge);
+enum {
+       PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR = BIT(0),
+};
+
+int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
+                        unsigned int flags);
 void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge);
 
 int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,