target-mips: fix ROTR and DROTR by zero

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

diff --git a/target-mips/translate.c b/target-mips/translate.c
index eb46b42..ba660ab 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1475,6 +1475,8 @@ static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc,
             tcg_gen_rotri_i32(t1, t1, uimm);
             tcg_gen_ext_i32_tl(cpu_gpr[rt], t1);
             tcg_temp_free_i32(t1);
+        } else {
+            tcg_gen_ext32s_tl(cpu_gpr[rt], t0);
         }
         opn = "rotr";
         break;
@@ -1494,6 +1496,8 @@ static void gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc,
     case OPC_DROTR:
         if (uimm != 0) {
             tcg_gen_rotri_tl(cpu_gpr[rt], t0, uimm);
+        } else {
+            tcg_gen_mov_tl(cpu_gpr[rt], t0);
         }
         opn = "drotr";
         break;