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target-i386: SSE4.1: fix pinsrb instruction
author
Aurelien Jarno
<aurelien@aurel32.net>
Tue, 26 Mar 2013 18:56:01 +0000
(19:56 +0100)
committer
Aurelien Jarno
<aurelien@aurel32.net>
Mon, 1 Apr 2013 16:49:15 +0000
(18:49 +0200)
gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should
be used instead of cpu_tmp0.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386/translate.c
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diff --git
a/target-i386/translate.c
b/target-i386/translate.c
index
7239696
..
7596a90
100644
(file)
--- a/
target-i386/translate.c
+++ b/
target-i386/translate.c
@@
-4404,9
+4404,9
@@
static void gen_sse(CPUX86State *env, DisasContext *s, int b,
if (mod == 3)
gen_op_mov_TN_reg(OT_LONG, 0, rm);
else
- tcg_gen_qemu_ld8u(cpu_
tmp0
, cpu_A0,
+ tcg_gen_qemu_ld8u(cpu_
T[0]
, cpu_A0,
(s->mem_index >> 2) - 1);
- tcg_gen_st8_tl(cpu_
tmp0
, cpu_env, offsetof(CPUX86State,
+ tcg_gen_st8_tl(cpu_
T[0]
, cpu_env, offsetof(CPUX86State,
xmm_regs[reg].XMM_B(val & 15)));
break;
case 0x21: /* insertps */