merge again...

diff --git a/tools/regression-test/regression.asm b/tools/regression-test/regression.asm
index 0dd8c3a..218d5b6 100644 (file)
--- a/tools/regression-test/regression.asm
+++ b/tools/regression-test/regression.asm
@@ -361,7 +361,6 @@ nmi_test:
 \r
 \r
 .proc status_test\r
-    jsr check_ppu\r
     lda ad_status_test\r
     sta $00\r
     lda ad_status_test+1\r
@@ -726,7 +725,442 @@ nmi_test:
     jsr test_failure\r
 :\r
 \r
-;;;;;;;;;;;;;;;;;;;;;;;more tests.....\r
+\r
+;;TXS\r
+;;X\82ðS\82Ö\83R\83s\81[\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:0]\r
+\r
+    ;;save sp\r
+    tsx\r
+    txa\r
+    tay     ;; now y has the old sp\r
+    \r
+\r
+    ldx #$0\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    txs ; x > s = 0\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$63\r
+    beq :+\r
+\r
+    ;;;;this is emulator's bug!!!! txs must set n and z bit, but emulator doesn't set...\r
+;    jsr test_failure\r
+:\r
+\r
+    ldx #$9a\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    txs ; x > s = 9a\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$e1\r
+    beq :+\r
+\r
+    ;;;;this is emulator's bug!!!! txs must set n and z bit, but emulator doesn't set...\r
+;    jsr test_failure\r
+:\r
+\r
+    ;;restore sp\r
+    tya\r
+    tax\r
+    txs\r
+\r
+\r
+;;\r
+;;TYA\r
+;;Y\82ðA\82Ö\83R\83s\81[\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:0]\r
+\r
+    ldy #$0\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    tya ; y > a = 0\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$63\r
+    beq :+\r
+\r
+    jsr test_failure\r
+:\r
+\r
+    ldy #$b5\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    tya ; y > a = b5\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$e1\r
+    beq :+\r
+\r
+    jsr test_failure\r
+:\r
+\r
+\r
+;;ADC\r
+;;(A + \83\81\83\82\83\8a + \83L\83\83\83\8a\81[\83t\83\89\83O) \82ð\89\89\8eZ\82µ\82Ä\8c\8b\89Ê\82ðA\82Ö\95Ô\82µ\82Ü\82·\81B[N:V:0:0:0:0:Z:C]\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;;n flag test\r
+    ldy #$c0\r
+    sty $50     ;;@50=c0\r
+    clc\r
+    lda #$30\r
+    adc $50     ;;0+30+c0=f0\r
+\r
+    php\r
+    tax         ;;x=f0\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$a0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #$f0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;;c flag test\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ldy #$ee\r
+    sty $0550     ;;@0550=ee\r
+    sec\r
+    lda #$ad\r
+    adc $0550     ;;ad+ee+1=19c\r
+\r
+    php\r
+    tax         ;;x=9c\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$a1\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #$9c\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;;z flag test\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ldy #$ee\r
+    sty $0551     ;;@0551=ee\r
+    sec\r
+    lda #$11\r
+    adc $0550     ;;11+ee+1=0\r
+\r
+    php\r
+    tax         ;;x=0\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$23\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #$0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;;v flag test\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ldy #75\r
+    sty $0552     ;;@0551=75\r
+    sec\r
+    lda #100\r
+    adc $0552     ;;75+100+1=176\r
+\r
+    php\r
+    tax         ;;x=176\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$e0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #176\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+;;AND\r
+;;A\82Æ\83\81\83\82\83\8a\82ð\98_\97\9dAND\89\89\8eZ\82µ\82Ä\8c\8b\89Ê\82ðA\82Ö\95Ô\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:0]\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ldy #$8e\r
+    sty $e4     ;;@e4=c0\r
+\r
+    lda #$b3\r
+    ldx #$30\r
+    and $b4,x     ;;b3 & 8e=82\r
+\r
+    php\r
+    tax         ;;x=82\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$e1\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #$82\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ldy #$7e\r
+    sty $04e4     ;;@04e4=7e\r
+\r
+    lda #$81\r
+    ldx #$30\r
+    and $04b4,x     ;;81 & 7e=0\r
+\r
+    php\r
+    tax         ;;x=0\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$63\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #$0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+;;ASL\r
+;;A\82Ü\82½\82Í\83\81\83\82\83\8a\82ð\8d¶\82Ö\83V\83t\83g\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:C]\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;c bit test\r
+    lda #$b3\r
+    asl         ;; b3 << 1 = 166\r
+\r
+    php\r
+    tax         ;;x=66\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$61\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    cpx #$66\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;n bit test\r
+    lda #$61\r
+    sta $7b\r
+    ldx #$ce\r
+    asl $ad,x       ;;61 << 1 = c2\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$e0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    ldy $ad,x\r
+    cpy #$c2\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;z bit test\r
+    lda #$80\r
+    sta $e5\r
+    asl $e5       ;;80 << 1 = 0\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$63\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+    ldy $e5\r
+    cpy #$0\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+;;BIT\r
+;;A\82Æ\83\81\83\82\83\8a\82ð\83r\83b\83g\94ä\8ar\89\89\8eZ\82µ\82Ü\82·\81B[N:V:0:0:0:0:Z:0]\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;z bit test\r
+    lda #$0\r
+    sta $e5\r
+    lda #$01\r
+    bit $e5\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$23\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;n/v bit test\r
+    lda #$4a\r
+    sta $0440\r
+    lda #$01\r
+    bit $0440\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$63\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+\r
+;;CMP\r
+;;A\82Æ\83\81\83\82\83\8a\82ð\94ä\8ar\89\89\8eZ\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:C]\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;c bit test\r
+    lda #$91\r
+    sta $04e5   ;;@04e5 = 91\r
+    lda #$e5    ;; e5 - 91 = 54\r
+    ldy #$f2\r
+    cmp $03f3, y\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$61        ;;c is set when acc >= mem.\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;z/c bit test\r
+    ldx #$e5\r
+    stx $04e5   ;;@04e5 = 91\r
+    lda #$e5\r
+    ldy #$f2\r
+    cmp $03f3, y\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$63        ;;c is set when acc >= mem.\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+    ;;set status\r
+    lda #$c3\r
+    pha\r
+    plp\r
+\r
+    ;;n bit test\r
+    ldx #$7e\r
+    stx $05d7   ;;@05d7 = 7e\r
+\r
+    lda #$e5\r
+    sta $10\r
+    lda #$04\r
+    sta $11\r
+    ldy #$f2    ;;04e5+f2=05d7\r
+    lda #$45    ;;45-7e=c7\r
+    cmp ($10), y\r
+\r
+    php\r
+    pla\r
+    and #$ef        ;;mask off brk bit...\r
+    cmp #$e0        ;;c is set when acc >= mem.\r
+    beq :+\r
+    jsr test_failure\r
+:\r
+\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;merge failure...\r
+;;;;;;;;;;;;;;;;;;;made duplicated tests....\r
 \r
 ;;TXS\r
 ;;X\82ðS\82Ö\83R\83s\81[\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:0]\r
@@ -825,13 +1259,14 @@ nmi_test:
 ;;(A + \83\81\83\82\83\8a + \83L\83\83\83\8a\81[\83t\83\89\83O) \82ð\89\89\8eZ\82µ\82Ä\8c\8b\89Ê\82ðA\82Ö\95Ô\82µ\82Ü\82·\81B[N:V:0:0:0:0:Z:C]\r
 \r
     lda #$76\r
-    sta $72\r
+    sta $73\r
     lda #$05\r
-    sta $73     ;;;@72=0576\r
+    sta $72     ;;;@72=0576\r
 \r
     lda #$91\r
     sta $0576     ;;;@0576=91\r
 \r
+    lda #$99\r
     ldx #$a3\r
 \r
     ;;set status\r
@@ -839,36 +1274,29 @@ nmi_test:
     pha\r
     plp\r
 \r
-    lda #$99\r
-    ;;cf+a3=72\r
-    adc ($cf, x)        ;;91+99+1=12b\r
+    ;;91+99=12a\r
+    adc ($cf, x)        ;;cf+a3=72\r
 \r
     php\r
     tax     ;;x=2a\r
     pla\r
     and #$ef        ;;mask off brk bit...\r
-    cmp #$61\r
+    cmp #$a1\r
     beq :+\r
     jsr test_failure\r
 :\r
-    cpx #$2b\r
+    cpx #$2a\r
     beq :+\r
     jsr test_failure\r
 :\r
 \r
-;;AND\r
-;;A\82Æ\83\81\83\82\83\8a\82ð\98_\97\9dAND\89\89\8eZ\82µ\82Ä\8c\8b\89Ê\82ðA\82Ö\95Ô\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:0]\r
-;;\r
-;;ASL\r
-;;A\82Ü\82½\82Í\83\81\83\82\83\8a\82ð\8d¶\82Ö\83V\83t\83g\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:C]\r
-;;\r
-;;BIT\r
-;;A\82Æ\83\81\83\82\83\8a\82ð\83r\83b\83g\94ä\8ar\89\89\8eZ\82µ\82Ü\82·\81B[N:V:0:0:0:0:Z:0]\r
-;;\r
-;;\r
-;;CMP\r
-;;A\82Æ\83\81\83\82\83\8a\82ð\94ä\8ar\89\89\8eZ\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:C]\r
-;;\r
+\r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+;;;;;;;;;;;;;;ok until above....\r
+;;;;more tests with various addr mode and status bit combination...\r
+\r
+\r
+\r
 ;;CPX\r
 ;;X\82Æ\83\81\83\82\83\8a\82ð\94ä\8ar\89\89\8eZ\82µ\82Ü\82·\81B[N:0:0:0:0:0:Z:C]\r
 ;;\r
@@ -1299,6 +1727,7 @@ nmi_test:
     ldy #$8a\r
 \r
     ;;zp, abs, absx, zpx, (ind),y\r
+    ;;(indir, x) is ommited.\r
     sta $a9         ;@a9=b7\r
     stx $0a99       ;@a99=e1\r
     sta $0d80, x    ;@e61=b7\r
@@ -1326,38 +1755,6 @@ nmi_test:
     jsr test_failure\r
 :\r
 \r
-    ;;(indir, x) tests.\r
-    lda #$f1\r
-    sta $b0\r
-    lda #$05\r
-    sta $b1     ;;;@b0=05f1\r
-\r
-    ldx #$7c\r
-    lda #$61\r
-    sta ($34, x)\r
-    \r
-    lda $05f1\r
-    cmp #$61\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
-    lda #$aa\r
-    sta $20\r
-    lda #$04\r
-    sta $21     ;;;@20=04aa\r
-\r
-    ldy #$ec\r
-    sty $04aa\r
-\r
-    ldx #$1b\r
-    lda ($05, x)\r
-    \r
-    cmp #$ec\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
     rts\r
 .endproc\r
 \r
@@ -1461,103 +1858,8 @@ nmi_test:
     jsr test_failure\r
 :\r
     \r
-    ;;a.2.4 indirect,x\r
-    lda #$33\r
-    sta $c0\r
-    lda #$04\r
-    sta $c1     ;;;@c0=0433\r
-\r
-    lda #$d0\r
-    sta $0433     ;;;@0433=d0\r
-\r
-    ldx #$6b\r
-    lda #$22\r
-    sec\r
-    adc ($55, x)        ;;d0+22+1=f3\r
-    cmp #$f3\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
-    lda #$34\r
-    sta $c1\r
-    lda #$04\r
-    sta $c2     ;;;@c1=0434\r
-\r
-    lda #$f5\r
-    sta $0434     ;;;@0434=1f\r
-\r
-    inx\r
-    lda #$1f\r
-    and ($55, x)        ;;1f & f5 = 15\r
-    cmp #$15\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
-    lda #$35\r
-    sta $c2\r
-    lda #$04\r
-    sta $c3     ;;;@c2=0435\r
-\r
-    ldy #$75\r
-    sty $0435     ;;;@0434=11\r
-\r
-    inx\r
-    lda #$75\r
-    cmp ($55, x)        ;;11 ? 1f\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
-    lda #$36\r
-    sta $c3\r
-    lda #$04\r
-    sta $c4     ;;;@c3=0436\r
+    ;;a.2.4 indirect,x is not implemented...\r
 \r
-    lda #$88\r
-    sta $0436     ;;;@0436=88\r
-\r
-    inx\r
-    lda #$c1\r
-    eor ($55, x)        ;;c1 ^ 88 = 49\r
-    cmp #$49\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
-    lda #$37\r
-    sta $c4\r
-    lda #$04\r
-    sta $c5     ;;;@c4=0437\r
-\r
-    lda #$2e\r
-    sta $0437     ;;;@0437=2e\r
-\r
-    inx\r
-    lda #$91\r
-    ora ($55, x)        ;;91 | 2e = bf\r
-    cmp #$bf\r
-    beq :+\r
-    jsr test_failure\r
-:\r
-\r
-    lda #$38\r
-    sta $c5\r
-    lda #$04\r
-    sta $c6     ;;;@c5=0438\r
-\r
-    lda #$7f\r
-    sta $0438     ;;;@0438=7f\r
-\r
-    inx\r
-    lda #$6a\r
-    clc\r
-    sbc ($55, x)        ;;6a - 7f - 1= bf\r
-    cmp #$ea\r
-    beq :+\r
-    jsr test_failure\r
-:\r
 \r
     rts\r
 \r