OSDN Git Service

staging: comedi: ni_tio: tidy up Gi_Mode_Bits
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Mon, 28 Jul 2014 17:26:51 +0000 (10:26 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Jul 2014 23:50:59 +0000 (16:50 -0700)
Convert this enum into defines and rename the CamelCase symbols.

For aesthetics, move the new defines so they are associated with
the register define.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/ni_tio.c
drivers/staging/comedi/drivers/ni_tio_internal.h
drivers/staging/comedi/drivers/ni_tiocmd.c

index bd6a21e..7a37d2b 100644 (file)
@@ -441,18 +441,18 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
            NI_GPCT_HARDWARE_DISARM_MASK | NI_GPCT_LOADING_ON_TC_BIT |
            NI_GPCT_LOADING_ON_GATE_BIT | NI_GPCT_LOAD_B_SELECT_BIT;
 
-       mode_reg_mask = mode_reg_direct_mask | Gi_Reload_Source_Switching_Bit;
+       mode_reg_mask = mode_reg_direct_mask | GI_RELOAD_SRC_SWITCHING;
        mode_reg_values = mode & mode_reg_direct_mask;
        switch (mode & NI_GPCT_RELOAD_SOURCE_MASK) {
        case NI_GPCT_RELOAD_SOURCE_FIXED_BITS:
                break;
        case NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS:
-               mode_reg_values |= Gi_Reload_Source_Switching_Bit;
+               mode_reg_values |= GI_RELOAD_SRC_SWITCHING;
                break;
        case NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS:
                input_select_bits |= GI_GATE_SEL_LOAD_SRC;
-               mode_reg_mask |= Gi_Gating_Mode_Mask;
-               mode_reg_values |= Gi_Level_Gating_Bits;
+               mode_reg_mask |= GI_GATING_MODE_MASK;
+               mode_reg_values |= GI_LEVEL_GATING;
                break;
        default:
                break;
@@ -907,18 +907,18 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned gate_index,
        case 0:
                if (chan == NI_GPCT_DISABLED_GATE_SELECT) {
                        ni_tio_set_bits(counter, NITIO_MODE_REG(cidx),
-                                       Gi_Gating_Mode_Mask,
-                                       Gi_Gating_Disabled_Bits);
+                                       GI_GATING_MODE_MASK,
+                                       GI_GATING_DISABLED);
                        return 0;
                }
                if (gate_source & CR_INVERT)
-                       mode |= Gi_Gate_Polarity_Bit;
+                       mode |= GI_GATE_POL_INVERT;
                if (gate_source & CR_EDGE)
-                       mode |= Gi_Rising_Edge_Gating_Bits;
+                       mode |= GI_RISING_EDGE_GATING;
                else
-                       mode |= Gi_Level_Gating_Bits;
+                       mode |= GI_LEVEL_GATING;
                ni_tio_set_bits(counter, NITIO_MODE_REG(cidx),
-                               Gi_Gate_Polarity_Bit | Gi_Gating_Mode_Mask,
+                               GI_GATE_POL_INVERT | GI_GATING_MODE_MASK,
                                mode);
                switch (counter_dev->variant) {
                case ni_gpct_variant_e_series:
@@ -1132,7 +1132,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
 
        switch (gate_index) {
        case 0:
-               if ((mode & Gi_Gating_Mode_Mask) == Gi_Gating_Disabled_Bits) {
+               if ((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED) {
                        *gate_source = NI_GPCT_DISABLED_GATE_SELECT;
                        return 0;
                }
@@ -1150,13 +1150,13 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
                        *gate_source = ni_660x_gate_to_generic_gate(gate);
                        break;
                }
-               if (mode & Gi_Gate_Polarity_Bit)
+               if (mode & GI_GATE_POL_INVERT)
                        *gate_source |= CR_INVERT;
-               if ((mode & Gi_Gating_Mode_Mask) != Gi_Level_Gating_Bits)
+               if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING)
                        *gate_source |= CR_EDGE;
                break;
        case 1:
-               if ((mode & Gi_Gating_Mode_Mask) == Gi_Gating_Disabled_Bits ||
+               if ((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED ||
                    !(counter_dev->regs[gate2_reg] & Gi_Second_Gate_Mode_Bit)) {
                        *gate_source = NI_GPCT_DISABLED_GATE_SELECT;
                        return 0;
@@ -1179,7 +1179,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
                if (counter_dev->regs[gate2_reg] & Gi_Second_Gate_Polarity_Bit)
                        *gate_source |= CR_INVERT;
                /* second gate can't have edge/level mode set independently */
-               if ((mode & Gi_Gating_Mode_Mask) != Gi_Level_Gating_Bits)
+               if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING)
                        *gate_source |= CR_EDGE;
                break;
        default:
index d559783..fbbe30c 100644 (file)
 #define NITIO_HW_SAVE_REG(x)           (NITIO_G0_HW_SAVE + (x))
 #define NITIO_SW_SAVE_REG(x)           (NITIO_G0_SW_SAVE + (x))
 #define NITIO_MODE_REG(x)              (NITIO_G0_MODE + (x))
+#define GI_GATING_DISABLED             (0 << 0)
+#define GI_LEVEL_GATING                        (1 << 0)
+#define GI_RISING_EDGE_GATING          (2 << 0)
+#define GI_FALLING_EDGE_GATING         (3 << 0)
+#define GI_GATING_MODE_MASK            (3 << 0)
+#define GI_GATE_ON_BOTH_EDGES          (1 << 2)
+#define GI_EDGE_GATE_STARTS_STOPS      (0 << 3)
+#define GI_EDGE_GATE_STOPS_STARTS      (1 << 3)
+#define GI_EDGE_GATE_STARTS            (2 << 3)
+#define GI_EDGE_GATE_NO_STARTS_OR_STOPS        (3 << 3)
+#define GI_EDGE_GATE_MODE_MASK         (3 << 3)
+#define GI_STOP_ON_GATE                        (0 << 5)
+#define GI_STOP_ON_GATE_OR_TC          (1 << 5)
+#define GI_STOP_ON_GATE_OR_SECOND_TC   (2 << 5)
+#define GI_STOP_MODE_MASK              (3 << 5)
+#define GI_LOAD_SRC_SEL                        (1 << 7)
+#define GI_OUTPUT_TC_PULSE             (1 << 8)
+#define GI_OUTPUT_TC_TOGGLE            (2 << 8)
+#define GI_OUTPUT_TC_OR_GATE_TOGGLE    (3 << 8)
+#define GI_OUTPUT_MODE_MASK            (3 << 8)
+#define GI_NO_HARDWARE_DISARM          (0 << 10)
+#define GI_DISARM_AT_TC                        (1 << 10)
+#define GI_DISARM_AT_GATE              (2 << 10)
+#define GI_DISARM_AT_TC_OR_GATE                (3 << 10)
+#define GI_COUNTING_ONCE_MASK          (3 << 10)
+#define GI_LOADING_ON_TC               (1 << 12)
+#define GI_GATE_POL_INVERT             (1 << 13)
+#define GI_LOADING_ON_GATE             (1 << 14)
+#define GI_RELOAD_SRC_SWITCHING                (1 << 15)
 #define NITIO_LOADA_REG(x)             (NITIO_G0_LOADA + (x))
 #define NITIO_LOADB_REG(x)             (NITIO_G0_LOADB + (x))
 #define NITIO_INPUT_SEL_REG(x)         (NITIO_G0_INPUT_SEL + (x))
 #define NITIO_STATUS_REG(x)            (NITIO_G0_STATUS + (x))
 #define NITIO_INT_ENA_REG(x)           (NITIO_G0_INT_ENA + (x))
 
-enum Gi_Mode_Bits {
-       Gi_Gating_Mode_Mask = 0x3,
-       Gi_Gating_Disabled_Bits = 0x0,
-       Gi_Level_Gating_Bits = 0x1,
-       Gi_Rising_Edge_Gating_Bits = 0x2,
-       Gi_Falling_Edge_Gating_Bits = 0x3,
-       Gi_Gate_On_Both_Edges_Bit = 0x4,        /* used in conjunction with
-                                                * rising edge gating mode */
-       Gi_Trigger_Mode_for_Edge_Gate_Mask = 0x18,
-       Gi_Edge_Gate_Starts_Stops_Bits = 0x0,
-       Gi_Edge_Gate_Stops_Starts_Bits = 0x8,
-       Gi_Edge_Gate_Starts_Bits = 0x10,
-       Gi_Edge_Gate_No_Starts_or_Stops_Bits = 0x18,
-       Gi_Stop_Mode_Mask = 0x60,
-       Gi_Stop_on_Gate_Bits = 0x00,
-       Gi_Stop_on_Gate_or_TC_Bits = 0x20,
-       Gi_Stop_on_Gate_or_Second_TC_Bits = 0x40,
-       Gi_Load_Source_Select_Bit = 0x80,
-       Gi_Output_Mode_Mask = 0x300,
-       Gi_Output_TC_Pulse_Bits = 0x100,
-       Gi_Output_TC_Toggle_Bits = 0x200,
-       Gi_Output_TC_or_Gate_Toggle_Bits = 0x300,
-       Gi_Counting_Once_Mask = 0xc00,
-       Gi_No_Hardware_Disarm_Bits = 0x000,
-       Gi_Disarm_at_TC_Bits = 0x400,
-       Gi_Disarm_at_Gate_Bits = 0x800,
-       Gi_Disarm_at_TC_or_Gate_Bits = 0xc00,
-       Gi_Loading_On_TC_Bit = 0x1000,
-       Gi_Gate_Polarity_Bit = 0x2000,
-       Gi_Loading_On_Gate_Bit = 0x4000,
-       Gi_Reload_Source_Switching_Bit = 0x8000
-};
-
 #define Gi_Second_Gate_Select_Shift 7
 /*FIXME: m-series has a second gate subselect bit */
 /*FIXME: m-series second gate sources are undocumented (by NI)*/
index 789d61f..16dba7f 100644 (file)
@@ -403,7 +403,7 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
        if (ack)
                write_register(counter, ack, NITIO_INT_ACK_REG(cidx));
        if (ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)) &
-           Gi_Loading_On_Gate_Bit) {
+           GI_LOADING_ON_GATE) {
                if (gxx_status & Gi_Stale_Data_Bit(cidx)) {
                        if (stale_data)
                                *stale_data = 1;