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drm/amd/display: Add debugfs entry for LTTPR register status
authorAurabindo Pillai <aurabindo.pillai@amd.com>
Tue, 23 Mar 2021 21:51:56 +0000 (17:51 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Apr 2021 20:51:48 +0000 (16:51 -0400)
[Why]
Functionality of LTTPR is reporter through the DPCD register

[How]
Expose a interface in debugfs to read the current status of
LTTPR as reported from the device's DPCD register

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

index 5a9809e..32f05ae 100644 (file)
@@ -400,6 +400,70 @@ static ssize_t dp_phy_settings_read(struct file *f, char __user *buf,
        return result;
 }
 
+static int dp_lttpr_status_show(struct seq_file *m, void *d)
+{
+       char *data;
+       struct amdgpu_dm_connector *connector = file_inode(m->file)->i_private;
+       struct dc_link *link = connector->dc_link;
+       uint32_t read_size = 1;
+       uint8_t repeater_count = 0;
+
+       data = kzalloc(read_size, GFP_KERNEL);
+       if (!data)
+               return 0;
+
+       dm_helpers_dp_read_dpcd(link->ctx, link, 0xF0002, data, read_size);
+
+       switch ((uint8_t)*data) {
+       case 0x80:
+               repeater_count = 1;
+               break;
+       case 0x40:
+               repeater_count = 2;
+               break;
+       case 0x20:
+               repeater_count = 3;
+               break;
+       case 0x10:
+               repeater_count = 4;
+               break;
+       case 0x8:
+               repeater_count = 5;
+               break;
+       case 0x4:
+               repeater_count = 6;
+               break;
+       case 0x2:
+               repeater_count = 7;
+               break;
+       case 0x1:
+               repeater_count = 8;
+               break;
+       case 0x0:
+               repeater_count = 0;
+               break;
+       default:
+               repeater_count = (uint8_t)*data;
+               break;
+       }
+
+       seq_printf(m, "phy repeater count: %d\n", repeater_count);
+
+       dm_helpers_dp_read_dpcd(link->ctx, link, 0xF0003, data, read_size);
+
+       if ((uint8_t)*data == 0x55)
+               seq_printf(m, "phy repeater mode: transparent\n");
+       else if ((uint8_t)*data == 0xAA)
+               seq_printf(m, "phy repeater mode: non-transparent\n");
+       else if ((uint8_t)*data == 0x00)
+               seq_printf(m, "phy repeater mode: non lttpr\n");
+       else
+               seq_printf(m, "phy repeater mode: read error\n");
+
+       kfree(data);
+       return 0;
+}
+
 static ssize_t dp_phy_settings_write(struct file *f, const char __user *buf,
                                 size_t size, loff_t *pos)
 {
@@ -2301,6 +2365,7 @@ DEFINE_SHOW_ATTRIBUTE(dp_dsc_fec_support);
 DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
 DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
 DEFINE_SHOW_ATTRIBUTE(output_bpc);
+DEFINE_SHOW_ATTRIBUTE(dp_lttpr_status);
 #ifdef CONFIG_DRM_AMD_DC_HDCP
 DEFINE_SHOW_ATTRIBUTE(hdcp_sink_capability);
 #endif
@@ -2421,6 +2486,7 @@ static const struct {
 } dp_debugfs_entries[] = {
                {"link_settings", &dp_link_settings_debugfs_fops},
                {"phy_settings", &dp_phy_settings_debugfs_fop},
+               {"lttpr_status", &dp_lttpr_status_fops},
                {"test_pattern", &dp_phy_test_pattern_fops},
 #ifdef CONFIG_DRM_AMD_DC_HDCP
                {"hdcp_sink_capability", &hdcp_sink_capability_fops},