* elf32-arm.c (INTERWORK_FLAG): Check BFD_LINKER_CREATED.
(elf32_arm_write_section): Declare early.
(elf32_arm_size_stubs): Skip non-stub sections in the stub BFD.
(arm_allocate_glue_section_space): Exclude empty sections.
(ARM_GLUE_SECTION_FLAGS): Add SEC_LINKER_CREATED.
(bfd_elf32_arm_add_glue_sections_to_bfd): Do not skip the stub
BFD.
(elf32_arm_output_glue_section, elf32_arm_final_link): New.
(elf32_arm_merge_eabi_attributes): Skip the stub BFD.
(elf32_arm_size_dynamic_sections): Allocate interworking
sections here.
(bfd_elf32_bfd_final_link): Define.
ld/
* emultempl/armelf.em (bfd_for_interwork, arm_elf_after_open)
(arm_elf_set_bfd_for_interworking): Delete.
(arm_elf_before_allocation): Do not set the interworking BFD.
Move allocation inside not-dynamic block.
(arm_elf_create_output_section_statements): Create glue sections
and set the interworking BFD here.
(LDEMUL_AFTER_OPEN): Delete.
ld/testsuite/
* ld-arm/farcall-mix.d, ld-arm/farcall-mix2.d,
ld-arm/farcall-group-size2.d, ld-arm/farcall-group.d,
ld-arm/farcall-mixed-lib.d: Update for linker changes.
+2009-04-21 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * elf32-arm.c (INTERWORK_FLAG): Check BFD_LINKER_CREATED.
+ (elf32_arm_write_section): Declare early.
+ (elf32_arm_size_stubs): Skip non-stub sections in the stub BFD.
+ (arm_allocate_glue_section_space): Exclude empty sections.
+ (ARM_GLUE_SECTION_FLAGS): Add SEC_LINKER_CREATED.
+ (bfd_elf32_arm_add_glue_sections_to_bfd): Do not skip the stub
+ BFD.
+ (elf32_arm_output_glue_section, elf32_arm_final_link): New.
+ (elf32_arm_merge_eabi_attributes): Skip the stub BFD.
+ (elf32_arm_size_dynamic_sections): Allocate interworking
+ sections here.
+ (bfd_elf32_bfd_final_link): Define.
+
2009-04-21 H.J. Lu <hongjiu.lu@intel.com>
* coff-ia64.c (COFF_PAGE_SIZE): Changed to 8K.
static struct elf_backend_data elf32_arm_vxworks_bed;
+static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
+ struct bfd_link_info *link_info,
+ asection *sec,
+ bfd_byte *contents);
+
/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
in that slot. */
interworkable. */
#define INTERWORK_FLAG(abfd) \
(EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
- || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
+ || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
+ || ((abfd)->flags & BFD_LINKER_CREATED))
/* The linker script knows the section names for placement.
The entry_names are used to do simple name mangling on the stubs.
for (stub_sec = htab->stub_bfd->sections;
stub_sec != NULL;
stub_sec = stub_sec->next)
- stub_sec->size = 0;
+ {
+ /* Ignore non-stub sections. */
+ if (!strstr (stub_sec->name, STUB_SUFFIX))
+ continue;
+
+ stub_sec->size = 0;
+ }
bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
bfd_byte * contents;
if (size == 0)
- return;
+ {
+ /* Do not include empty glue sections in the output. */
+ if (abfd != NULL)
+ {
+ s = bfd_get_section_by_name (abfd, name);
+ if (s != NULL)
+ s->flags |= SEC_EXCLUDE;
+ }
+ return;
+ }
BFD_ASSERT (abfd != NULL);
return val;
}
-/* Note: we do not include the flag SEC_LINKER_CREATED, as that
- would prevent elf_link_input_bfd() from processing the contents
- of the section. */
#define ARM_GLUE_SECTION_FLAGS \
- (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY)
+ (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
+ | SEC_READONLY | SEC_LINKER_CREATED)
/* Create a fake section for use by the ARM backend of the linker. */
if (info->relocatable)
return TRUE;
- /* Linker stubs don't need glue. */
- if (!strcmp (abfd->filename, "linker stubs"))
- return TRUE;
-
return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
&& arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
&& arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
return TRUE;
}
+static bfd_boolean
+elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
+ bfd *ibfd, const char *name)
+{
+ asection *sec, *osec;
+
+ sec = bfd_get_section_by_name (ibfd, name);
+ if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
+ return TRUE;
+
+ osec = sec->output_section;
+ if (elf32_arm_write_section (obfd, info, sec, sec->contents))
+ return TRUE;
+
+ if (! bfd_set_section_contents (obfd, osec, sec->contents,
+ sec->output_offset, sec->size))
+ return FALSE;
+
+ return TRUE;
+}
+
+static bfd_boolean
+elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
+{
+ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
+
+ /* Invoke the regular ELF backend linker to do all the work. */
+ if (!bfd_elf_final_link (abfd, info))
+ return FALSE;
+
+ /* Write out any glue sections now that we have created all the
+ stubs. */
+ if (globals->bfd_of_glue_owner != NULL)
+ {
+ if (! elf32_arm_output_glue_section (info, abfd,
+ globals->bfd_of_glue_owner,
+ ARM2THUMB_GLUE_SECTION_NAME))
+ return FALSE;
+
+ if (! elf32_arm_output_glue_section (info, abfd,
+ globals->bfd_of_glue_owner,
+ THUMB2ARM_GLUE_SECTION_NAME))
+ return FALSE;
+
+ if (! elf32_arm_output_glue_section (info, abfd,
+ globals->bfd_of_glue_owner,
+ VFP11_ERRATUM_VENEER_SECTION_NAME))
+ return FALSE;
+
+ if (! elf32_arm_output_glue_section (info, abfd,
+ globals->bfd_of_glue_owner,
+ ARM_BX_GLUE_SECTION_NAME))
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
/* Set the right machine number. */
static bfd_boolean
int i;
bfd_boolean result = TRUE;
+ /* Skip the linker stubs file. This preserves previous behavior
+ of accepting unknown attributes in the first input file - but
+ is that a bug? */
+ if (ibfd->flags & BFD_LINKER_CREATED)
+ return TRUE;
+
if (!elf_known_obj_attributes_proc (obfd)[0].i)
{
/* This is the first object. Copy the attributes. */
ibfd->filename);
}
+ /* Allocate space for the glue sections now that we've sized them. */
+ bfd_elf32_arm_allocate_interworking_sections (info);
+
/* The check_relocs and adjust_dynamic_symbol entry points have
determined the sizes of the various dynamic sections. Allocate
memory for them. */
#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
+#define bfd_elf32_bfd_final_link elf32_arm_final_link
#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
+2009-04-21 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * emultempl/armelf.em (bfd_for_interwork, arm_elf_after_open)
+ (arm_elf_set_bfd_for_interworking): Delete.
+ (arm_elf_before_allocation): Do not set the interworking BFD.
+ Move allocation inside not-dynamic block.
+ (arm_elf_create_output_section_statements): Create glue sections
+ and set the interworking BFD here.
+ (LDEMUL_AFTER_OPEN): Delete.
+
2009-04-16 Richard Sandiford <r.sandiford@uk.ibm.com>
* ldlang.c (lang_one_common): Use bfd_define_common_symbol.
#include "elf/arm.h"
static char *thumb_entry_symbol = NULL;
-static bfd *bfd_for_interwork;
static int byteswap_code = 0;
static int target1_is_rel = 0${TARGET1_IS_REL};
static char *target2_type = "${TARGET2_TYPE}";
}
static void
-arm_elf_after_open (void)
-{
- {
- LANG_FOR_EACH_INPUT_STATEMENT (is)
- {
- bfd_elf32_arm_add_glue_sections_to_bfd (is->the_bfd, & link_info);
- }
- }
-
- /* Call the standard elf routine. */
- gld${EMULATION_NAME}_after_open ();
-}
-
-static void
-arm_elf_set_bfd_for_interworking (lang_statement_union_type *statement)
-{
- if (statement->header.type == lang_input_section_enum)
- {
- asection *i = statement->input_section.section;
-
- if (!((lang_input_statement_type *) i->owner->usrdata)->just_syms_flag
- && (i->flags & SEC_EXCLUDE) == 0)
- {
- asection *output_section = i->output_section;
-
- ASSERT (output_section->owner == link_info.output_bfd);
-
- /* Don't attach the interworking stubs to a dynamic object, to
- an empty section, etc. */
- if ((output_section->flags & SEC_HAS_CONTENTS) != 0
- && (i->flags & SEC_NEVER_LOAD) == 0
- && ! (i->owner->flags & DYNAMIC))
- bfd_for_interwork = i->owner;
- }
- }
-}
-
-static void
arm_elf_before_allocation (void)
{
- if (link_info.input_bfds != NULL)
- {
- /* The interworking bfd must be the last one in the link. */
- bfd_for_interwork = NULL;
-
- lang_for_each_statement (arm_elf_set_bfd_for_interworking);
-
- /* If bfd_for_interwork is NULL, then there are no loadable sections
- with real contents to be linked, so we are not going to have to
- create any interworking stubs, so it is OK not to call
- bfd_elf32_arm_get_bfd_for_interworking. */
- if (bfd_for_interwork != NULL)
- bfd_elf32_arm_get_bfd_for_interworking (bfd_for_interwork, &link_info);
- }
-
bfd_elf32_arm_set_byteswap_code (&link_info, byteswap_code);
/* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
/* xgettext:c-format */
einfo (_("Errors encountered processing file %s"), is->filename);
}
+
+ /* We have seen it all. Allocate it, and carry on. */
+ bfd_elf32_arm_allocate_interworking_sections (& link_info);
}
/* Call the standard elf routine. */
gld${EMULATION_NAME}_before_allocation ();
-
- /* We have seen it all. Allocate it, and carry on. */
- bfd_elf32_arm_allocate_interworking_sections (& link_info);
}
static void
stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
ldlang_add_file (stub_file);
+
+ /* Also use the stub file for stubs placed in a single output section. */
+ bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
+ bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
}
/* Avoid processing the fake stub_file in vercheck, stat_needed and
break;
'
-# We have our own after_open and before_allocation functions, but they call
+# We have our own before_allocation etc. functions, but they call
# the standard routines, so give them a different name.
-LDEMUL_AFTER_OPEN=arm_elf_after_open
LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
LDEMUL_AFTER_ALLOCATION=arm_elf_after_allocation
LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
+2009-04-21 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * ld-arm/farcall-mix.d, ld-arm/farcall-mix2.d,
+ ld-arm/farcall-group-size2.d, ld-arm/farcall-group.d,
+ ld-arm/farcall-mixed-lib.d: Update for linker changes.
+
2009-04-17 Christophe Lyon <christophe.lyon@st.com>
* ld-arm/arm-elf.exp: Add new test farcall-mixed-lib.
Disassembly of section .text:
00001000 <_start>:
- 1000: eb000002 bl 1010 <__bar_from_arm>
- 1004: ebffffff bl 1008 <__bar2_veneer>
-00001008 <__bar2_veneer>:
- 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar2_veneer\+0x4>
- 100c: 02003024 .word 0x02003024
-00001010 <__bar_from_arm>:
- 1010: e59fc000 ldr ip, \[pc, #0\] ; 1018 <__bar_from_arm\+0x8>
- 1014: e12fff1c bx ip
- 1018: 02003021 .word 0x02003021
+ 1000: eb000000 bl 1008 <__bar_from_arm>
+ 1004: eb000002 bl 1014 <__bar2_veneer>
+00001008 <__bar_from_arm>:
+ 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8>
+ 100c: e12fff1c bx ip
+ 1010: 02003021 .word 0x02003021
+00001014 <__bar2_veneer>:
+ 1014: e51ff004 ldr pc, \[pc, #-4\] ; 1018 <__bar2_veneer\+0x4>
+ 1018: 02003024 .word 0x02003024
101c: 00000000 .word 0x00000000
00001020 <myfunc>:
- 1020: eb000002 bl 1030 <__bar3_veneer>
- 1024: eb000006 bl 1044 <__bar4_from_arm>
- 1028: eb000002 bl 1038 <__bar5_from_arm>
+ 1020: eb000008 bl 1048 <__bar3_veneer>
+ 1024: eb000004 bl 103c <__bar4_from_arm>
+ 1028: eb000000 bl 1030 <__bar5_from_arm>
102c: 00000000 andeq r0, r0, r0
-00001030 <__bar3_veneer>:
- 1030: e51ff004 ldr pc, \[pc, #-4\] ; 1034 <__bar3_veneer\+0x4>
- 1034: 02003028 .word 0x02003028
-00001038 <__bar5_from_arm>:
- 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar5_from_arm\+0x8>
- 103c: e12fff1c bx ip
- 1040: 0200302f .word 0x0200302f
-00001044 <__bar4_from_arm>:
- 1044: e59fc000 ldr ip, \[pc, #0\] ; 104c <__bar4_from_arm\+0x8>
- 1048: e12fff1c bx ip
- 104c: 0200302d .word 0x0200302d
+00001030 <__bar5_from_arm>:
+ 1030: e59fc000 ldr ip, \[pc, #0\] ; 1038 <__bar5_from_arm\+0x8>
+ 1034: e12fff1c bx ip
+ 1038: 0200302f .word 0x0200302f
+0000103c <__bar4_from_arm>:
+ 103c: e59fc000 ldr ip, \[pc, #0\] ; 1044 <__bar4_from_arm\+0x8>
+ 1040: e12fff1c bx ip
+ 1044: 0200302d .word 0x0200302d
+00001048 <__bar3_veneer>:
+ 1048: e51ff004 ldr pc, \[pc, #-4\] ; 104c <__bar3_veneer\+0x4>
+ 104c: 02003028 .word 0x02003028
...
Disassembly of section .foo:
Disassembly of section .text:
00001000 <_start>:
- 1000: eb000007 bl 1024 <__bar_from_arm>
- 1004: eb00000c bl 103c <__bar2_veneer>
+ 1000: eb00000c bl 1038 <__bar_from_arm>
+ 1004: eb00000e bl 1044 <__bar2_veneer>
00001008 <myfunc>:
- 1008: eb00000d bl 1044 <__bar3_veneer>
- 100c: eb000007 bl 1030 <__bar4_from_arm>
+ 1008: eb000008 bl 1030 <__bar3_veneer>
+ 100c: eb000004 bl 1024 <__bar4_from_arm>
1010: eb000000 bl 1018 <__bar5_from_arm>
1014: 00000000 andeq r0, r0, r0
1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar5_from_arm\+0x8>
101c: e12fff1c bx ip
1020: 0200302f .word 0x0200302f
-00001024 <__bar_from_arm>:
- 1024: e59fc000 ldr ip, \[pc, #0\] ; 102c <__bar_from_arm\+0x8>
+00001024 <__bar4_from_arm>:
+ 1024: e59fc000 ldr ip, \[pc, #0\] ; 102c <__bar4_from_arm\+0x8>
1028: e12fff1c bx ip
- 102c: 02003021 .word 0x02003021
-00001030 <__bar4_from_arm>:
- 1030: e59fc000 ldr ip, \[pc, #0\] ; 1038 <__bar4_from_arm\+0x8>
- 1034: e12fff1c bx ip
- 1038: 0200302d .word 0x0200302d
-0000103c <__bar2_veneer>:
- 103c: e51ff004 ldr pc, \[pc, #-4\] ; 1040 <__bar2_veneer\+0x4>
- 1040: 02003024 .word 0x02003024
-00001044 <__bar3_veneer>:
- 1044: e51ff004 ldr pc, \[pc, #-4\] ; 1048 <__bar3_veneer\+0x4>
- 1048: 02003028 .word 0x02003028
+ 102c: 0200302d .word 0x0200302d
+00001030 <__bar3_veneer>:
+ 1030: e51ff004 ldr pc, \[pc, #-4\] ; 1034 <__bar3_veneer\+0x4>
+ 1034: 02003028 .word 0x02003028
+00001038 <__bar_from_arm>:
+ 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar_from_arm\+0x8>
+ 103c: e12fff1c bx ip
+ 1040: 02003021 .word 0x02003021
+00001044 <__bar2_veneer>:
+ 1044: e51ff004 ldr pc, \[pc, #-4\] ; 1048 <__bar2_veneer\+0x4>
+ 1048: 02003024 .word 0x02003024
...
Disassembly of section .foo:
Disassembly of section .text:
00001000 <_start>:
- 1000: eb000004 bl 1018 <__bar_from_arm>
- 1004: eb000006 bl 1024 <__bar2_veneer>
- 1008: eb00000a bl 1038 <__bar3_veneer>
+ 1000: eb000009 bl 102c <__bar_from_arm>
+ 1004: eb00000b bl 1038 <__bar2_veneer>
+ 1008: eb000005 bl 1024 <__bar3_veneer>
100c: eb00000b bl 1040 <__bar4_from_arm>
- 1010: eb000005 bl 102c <__bar5_from_arm>
+ 1010: eb000000 bl 1018 <__bar5_from_arm>
1014: 00000000 andeq r0, r0, r0
-00001018 <__bar_from_arm>:
- 1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar_from_arm\+0x8>
+00001018 <__bar5_from_arm>:
+ 1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar5_from_arm\+0x8>
101c: e12fff1c bx ip
- 1020: 02002021 .word 0x02002021
-00001024 <__bar2_veneer>:
- 1024: e51ff004 ldr pc, \[pc, #-4\] ; 1028 <__bar2_veneer\+0x4>
- 1028: 02002024 .word 0x02002024
-0000102c <__bar5_from_arm>:
- 102c: e59fc000 ldr ip, \[pc, #0\] ; 1034 <__bar5_from_arm\+0x8>
+ 1020: 0200202f .word 0x0200202f
+00001024 <__bar3_veneer>:
+ 1024: e51ff004 ldr pc, \[pc, #-4\] ; 1028 <__bar3_veneer\+0x4>
+ 1028: 02002028 .word 0x02002028
+0000102c <__bar_from_arm>:
+ 102c: e59fc000 ldr ip, \[pc, #0\] ; 1034 <__bar_from_arm\+0x8>
1030: e12fff1c bx ip
- 1034: 0200202f .word 0x0200202f
-00001038 <__bar3_veneer>:
- 1038: e51ff004 ldr pc, \[pc, #-4\] ; 103c <__bar3_veneer\+0x4>
- 103c: 02002028 .word 0x02002028
+ 1034: 02002021 .word 0x02002021
+00001038 <__bar2_veneer>:
+ 1038: e51ff004 ldr pc, \[pc, #-4\] ; 103c <__bar2_veneer\+0x4>
+ 103c: 02002024 .word 0x02002024
00001040 <__bar4_from_arm>:
1040: e59fc000 ldr ip, \[pc, #0\] ; 1048 <__bar4_from_arm\+0x8>
1044: e12fff1c bx ip
Disassembly of section .mytext:
00002000 <__bar5_from_arm-0x10>:
- 2000: eb000005 bl 201c <__bar3_veneer>
- 2004: eb000006 bl 2024 <__bar4_from_arm>
+ 2000: eb000008 bl 2028 <__bar3_veneer>
+ 2004: eb000004 bl 201c <__bar4_from_arm>
2008: eb000000 bl 2010 <__bar5_from_arm>
200c: 00000000 andeq r0, r0, r0
00002010 <__bar5_from_arm>:
2010: e59fc000 ldr ip, \[pc, #0\] ; 2018 <__bar5_from_arm\+0x8>
2014: e12fff1c bx ip
2018: 0200302f .word 0x0200302f
-0000201c <__bar3_veneer>:
- 201c: e51ff004 ldr pc, \[pc, #-4\] ; 2020 <__bar3_veneer\+0x4>
- 2020: 02003028 .word 0x02003028
-00002024 <__bar4_from_arm>:
- 2024: e59fc000 ldr ip, \[pc, #0\] ; 202c <__bar4_from_arm\+0x8>
- 2028: e12fff1c bx ip
- 202c: 0200302d .word 0x0200302d
+0000201c <__bar4_from_arm>:
+ 201c: e59fc000 ldr ip, \[pc, #0\] ; 2024 <__bar4_from_arm\+0x8>
+ 2020: e12fff1c bx ip
+ 2024: 0200302d .word 0x0200302d
+00002028 <__bar3_veneer>:
+ 2028: e51ff004 ldr pc, \[pc, #-4\] ; 202c <__bar3_veneer\+0x4>
+ 202c: 02003028 .word 0x02003028
...
Disassembly of section .foo:
.*: e1a00000 .word 0xe1a00000
.* <lib_func2>:
- .*: f000 e80c blx 100030c <__app_func_from_thumb>
- .*: f000 e804 blx 1000300 <__app_func_weak_from_thumb>
+ .*: f000 e806 blx 1000300 <__app_func_from_thumb>
+ .*: f000 e80a blx 100030c <__app_func_weak_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop \(mov r8, r8\)
.*: 46c0 nop \(mov r8, r8\)
.*: 46c0 nop \(mov r8, r8\)
-.* <__app_func_weak_from_thumb>:
- .*: e59fc000 ldr ip, \[pc, #0\] ; 1000308 <__app_func_weak_from_thumb\+0x8>
+.* <__app_func_from_thumb>:
+ .*: e59fc000 ldr ip, \[pc, #0\] ; 1000308 <__app_func_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
- .*: feffffb4 .word 0xfeffffb4
+ .*: feffffa8 .word 0xfeffffa8
-.* <__app_func_from_thumb>:
- .*: e59fc000 ldr ip, \[pc, #0\] ; 1000314 <__app_func_from_thumb\+0x8>
+.* <__app_func_weak_from_thumb>:
+ .*: e59fc000 ldr ip, \[pc, #0\] ; 1000314 <__app_func_weak_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
- .*: feffff9c .word 0xfeffff9c
+ .*: feffffa8 .word 0xfeffffa8
...
.* <lib_func3>:
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