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ARM64: dts: meson-gx: fix UART pclk clock name
authorNeil Armstrong <narmstrong@baylibre.com>
Mon, 4 Dec 2017 09:04:53 +0000 (10:04 +0100)
committerKevin Hilman <khilman@baylibre.com>
Fri, 8 Dec 2017 18:39:11 +0000 (10:39 -0800)
The clock-names for pclk was wrongly set to "core", but the bindings
specifies "pclk".
This was not cathed until the legacy non-documented bindings were removed.

Reported-by: Andreas Färber <afaerber@suse.de>
Fixes: f72d6f6037b7 ("ARM64: dts: meson-gx: use stable UART bindings with correct gate clock")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

index ead895a..1fb8b9d 100644 (file)
 
 &uart_B {
        clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_C {
        clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &vpu {
index 8ed981f..6524b89 100644 (file)
 
 &uart_A {
        clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_AO {
 
 &uart_B {
        clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_C {
        clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &vpu {