OSDN Git Service

drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a better...
authorEvan Quan <evan.quan@amd.com>
Fri, 29 Dec 2017 06:46:13 +0000 (14:46 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 19 Feb 2018 19:17:05 +0000 (14:17 -0500)
other parameter

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
drivers/gpu/drm/amd/include/kgd_pp_interface.h
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index a8437a3..8a8d09d 100644 (file)
@@ -328,8 +328,8 @@ enum amdgpu_pcie_gen {
 #define amdgpu_dpm_set_mclk_od(adev, value) \
                ((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))
 
-#define amdgpu_dpm_dispatch_task(adev, task_id, input, output)         \
-               ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))
+#define amdgpu_dpm_dispatch_task(adev, task_id, user_state)            \
+               ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (user_state))
 
 #define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \
                ((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))
index 01a996c..e5ee7cf 100644 (file)
@@ -116,7 +116,7 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev,
        }
 
        if (adev->powerplay.pp_funcs->dispatch_tasks) {
-               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);
+               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state);
        } else {
                mutex_lock(&adev->pm.mutex);
                adev->pm.dpm.user_state = state;
@@ -316,7 +316,7 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev,
                if (state != POWER_STATE_TYPE_INTERNAL_BOOT &&
                    state != POWER_STATE_TYPE_DEFAULT) {
                        amdgpu_dpm_dispatch_task(adev,
-                                       AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);
+                                       AMD_PP_TASK_ENABLE_USER_STATE, &state);
                        adev->pp_force_state_enabled = true;
                }
        }
@@ -530,7 +530,7 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
                amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
 
        if (adev->powerplay.pp_funcs->dispatch_tasks) {
-               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
+               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
        } else {
                adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
                amdgpu_pm_compute_clocks(adev);
@@ -574,7 +574,7 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
                amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
 
        if (adev->powerplay.pp_funcs->dispatch_tasks) {
-               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
+               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
        } else {
                adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
                amdgpu_pm_compute_clocks(adev);
@@ -1462,7 +1462,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
        }
 
        if (adev->powerplay.pp_funcs->dispatch_tasks) {
-               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL, NULL);
+               amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);
        } else {
                mutex_lock(&adev->pm.mutex);
                adev->pm.dpm.new_active_crtcs = 0;
index ed27626..0f89d2a 100644 (file)
@@ -256,7 +256,7 @@ struct amd_pm_funcs {
        void (*powergate_vce)(void *handle, bool gate);
        struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
        int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
-                                  void *input, void *output);
+                       enum amd_pm_state_type *user_state);
        int (*load_firmware)(void *handle);
        int (*wait_for_fw_loading_complete)(void *handle);
        int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
index 4c3223a..8859b67 100644 (file)
@@ -33,7 +33,7 @@
 #define PP_DPM_DISABLED 0xCCCC
 
 static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
-               void *input, void *output);
+               enum amd_pm_state_type *user_state);
 
 static inline int pp_check(struct pp_instance *handle)
 {
@@ -198,7 +198,7 @@ static int pp_late_init(void *handle)
        ret = pp_check(pp_handle);
        if (ret == 0)
                pp_dpm_dispatch_tasks(pp_handle,
-                                       AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
+                                       AMD_PP_TASK_COMPLETE_INIT, NULL);
 
        return 0;
 }
@@ -392,7 +392,7 @@ static int pp_dpm_force_performance_level(void *handle,
        mutex_lock(&pp_handle->pp_lock);
        pp_dpm_en_umd_pstate(hwmgr, &level);
        hwmgr->request_dpm_level = level;
-       hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
+       hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
        mutex_unlock(&pp_handle->pp_lock);
 
        return 0;
@@ -511,7 +511,7 @@ static void pp_dpm_powergate_uvd(void *handle, bool gate)
 }
 
 static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
-               void *input, void *output)
+               enum amd_pm_state_type *user_state)
 {
        int ret = 0;
        struct pp_instance *pp_handle = (struct pp_instance *)handle;
@@ -522,7 +522,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
                return ret;
 
        mutex_lock(&pp_handle->pp_lock);
-       ret = hwmgr_handle_task(pp_handle, task_id, input, output);
+       ret = hwmgr_handle_task(pp_handle, task_id, user_state);
        mutex_unlock(&pp_handle->pp_lock);
 
        return ret;
@@ -799,7 +799,7 @@ static int amd_powerplay_reset(void *handle)
        if (ret)
                return ret;
 
-       return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
+       return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL);
 }
 
 static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)
index ec3cdf5..654cb11 100644 (file)
@@ -369,7 +369,7 @@ static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type  state)
 }
 
 int hwmgr_handle_task(struct pp_instance *handle, enum amd_pp_task task_id,
-               void *input, void *output)
+               enum amd_pm_state_type *user_state)
 {
        int ret = 0;
        struct pp_hwmgr *hwmgr;
@@ -391,17 +391,15 @@ int hwmgr_handle_task(struct pp_instance *handle, enum amd_pp_task task_id,
                break;
        case AMD_PP_TASK_ENABLE_USER_STATE:
        {
-               enum amd_pm_state_type ps;
                enum PP_StateUILabel requested_ui_label;
                struct pp_power_state *requested_ps = NULL;
 
-               if (input == NULL) {
+               if (user_state == NULL) {
                        ret = -EINVAL;
                        break;
                }
-               ps = *(unsigned long *)input;
 
-               requested_ui_label = power_state_convert(ps);
+               requested_ui_label = power_state_convert(*user_state);
                ret = psm_set_user_performance_state(hwmgr, requested_ui_label, &requested_ps);
                if (ret)
                        return ret;
index 565fe08..bd2889f 100644 (file)
@@ -761,7 +761,7 @@ extern int hwmgr_hw_suspend(struct pp_instance *handle);
 extern int hwmgr_hw_resume(struct pp_instance *handle);
 extern int hwmgr_handle_task(struct pp_instance *handle,
                                enum amd_pp_task task_id,
-                               void *input, void *output);
+                               enum amd_pm_state_type *user_state);
 extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index,
                                uint32_t value, uint32_t mask);