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memory: tegra: Implement SID override programming
authorThierry Reding <treding@nvidia.com>
Thu, 3 Jun 2021 16:46:24 +0000 (18:46 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thu, 3 Jun 2021 19:50:43 +0000 (21:50 +0200)
Instead of programming all SID overrides during early boot, perform the
operation on-demand after the SMMU translations have been set up for a
device. This reuses data from device tree to match memory clients for a
device and programs the SID specified in device tree, which corresponds
to the SID used for the SMMU context banks for the device.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
drivers/memory/tegra/mc.c
drivers/memory/tegra/tegra186.c
include/soc/tegra/mc.h

index 11b83de..3c5aae7 100644 (file)
@@ -97,6 +97,15 @@ struct tegra_mc *devm_tegra_memory_controller_get(struct device *dev)
 }
 EXPORT_SYMBOL_GPL(devm_tegra_memory_controller_get);
 
+int tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev)
+{
+       if (mc->soc->ops && mc->soc->ops->probe_device)
+               return mc->soc->ops->probe_device(mc, dev);
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(tegra_mc_probe_device);
+
 static int tegra_mc_block_dma_common(struct tegra_mc *mc,
                                     const struct tegra_mc_reset *rst)
 {
index 1f87915..e65eac5 100644 (file)
@@ -4,6 +4,7 @@
  */
 
 #include <linux/io.h>
+#include <linux/iommu.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
 #include <linux/of_device.h>
 #include <dt-bindings/memory/tegra186-mc.h>
 #endif
 
+#define MC_SID_STREAMID_OVERRIDE_MASK GENMASK(7, 0)
+#define MC_SID_STREAMID_SECURITY_WRITE_ACCESS_DISABLED BIT(16)
+#define MC_SID_STREAMID_SECURITY_OVERRIDE BIT(8)
+
 static void tegra186_mc_program_sid(struct tegra_mc *mc)
 {
        unsigned int i;
@@ -66,10 +71,77 @@ static int tegra186_mc_resume(struct tegra_mc *mc)
        return 0;
 }
 
+static void tegra186_mc_client_sid_override(struct tegra_mc *mc,
+                                           const struct tegra_mc_client *client,
+                                           unsigned int sid)
+{
+       u32 value, old;
+
+       value = readl(mc->regs + client->regs.sid.security);
+       if ((value & MC_SID_STREAMID_SECURITY_OVERRIDE) == 0) {
+               /*
+                * If the secure firmware has locked this down the override
+                * for this memory client, there's nothing we can do here.
+                */
+               if (value & MC_SID_STREAMID_SECURITY_WRITE_ACCESS_DISABLED)
+                       return;
+
+               /*
+                * Otherwise, try to set the override itself. Typically the
+                * secure firmware will never have set this configuration.
+                * Instead, it will either have disabled write access to
+                * this field, or it will already have set an explicit
+                * override itself.
+                */
+               WARN_ON((value & MC_SID_STREAMID_SECURITY_OVERRIDE) == 0);
+
+               value |= MC_SID_STREAMID_SECURITY_OVERRIDE;
+               writel(value, mc->regs + client->regs.sid.security);
+       }
+
+       value = readl(mc->regs + client->regs.sid.override);
+       old = value & MC_SID_STREAMID_OVERRIDE_MASK;
+
+       if (old != sid) {
+               dev_dbg(mc->dev, "overriding SID %x for %s with %x\n", old,
+                       client->name, sid);
+               writel(sid, mc->regs + client->regs.sid.override);
+       }
+}
+
+static int tegra186_mc_probe_device(struct tegra_mc *mc, struct device *dev)
+{
+#if IS_ENABLED(CONFIG_IOMMU_API)
+       struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+       struct of_phandle_args args;
+       unsigned int i, index = 0;
+
+       while (!of_parse_phandle_with_args(dev->of_node, "interconnects", "#interconnect-cells",
+                                          index, &args)) {
+               if (args.np == mc->dev->of_node && args.args_count != 0) {
+                       for (i = 0; i < mc->soc->num_clients; i++) {
+                               const struct tegra_mc_client *client = &mc->soc->clients[i];
+
+                               if (client->id == args.args[0]) {
+                                       u32 sid = fwspec->ids[0] & MC_SID_STREAMID_OVERRIDE_MASK;
+
+                                       tegra186_mc_client_sid_override(mc, client, sid);
+                               }
+                       }
+               }
+
+               index++;
+       }
+#endif
+
+       return 0;
+}
+
 const struct tegra_mc_ops tegra186_mc_ops = {
        .probe = tegra186_mc_probe,
        .remove = tegra186_mc_remove,
        .resume = tegra186_mc_resume,
+       .probe_device = tegra186_mc_probe_device,
 };
 
 #if defined(CONFIG_ARCH_TEGRA_186_SOC)
index 1bd5aed..e19c250 100644 (file)
@@ -180,6 +180,7 @@ struct tegra_mc_ops {
        int (*suspend)(struct tegra_mc *mc);
        int (*resume)(struct tegra_mc *mc);
        irqreturn_t (*handle_irq)(int irq, void *data);
+       int (*probe_device)(struct tegra_mc *mc, struct device *dev);
 };
 
 struct tegra_mc_soc {
@@ -244,4 +245,6 @@ devm_tegra_memory_controller_get(struct device *dev)
 }
 #endif
 
+int tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev);
+
 #endif /* __SOC_TEGRA_MC_H__ */