ARM: mvebu: conditionalize Armada 375 coherency workaround

The Armada 375 coherency workaround only needs to be applied to the Z1
revision of the SoC. The A0 and later revisions have been fixed, and
no longer need this workaround.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 9d5ccd3..d5a975b 100644 (file)
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -33,6 +33,7 @@
 #include <asm/cacheflush.h>
 #include "armada-370-xp.h"
 #include "coherency.h"
+#include "mvebu-soc-id.h"
 
 unsigned long coherency_phys_base;
 void __iomem *coherency_base;
@@ -365,8 +366,13 @@ static int __init coherency_late_init(void)
        if (type == COHERENCY_FABRIC_TYPE_NONE)
                return 0;
 
-       if (type == COHERENCY_FABRIC_TYPE_ARMADA_375)
-               armada_375_coherency_init_wa();
+       if (type == COHERENCY_FABRIC_TYPE_ARMADA_375) {
+               u32 dev, rev;
+
+               if (mvebu_get_soc_id(&dev, &rev) == 0 &&
+                   rev == ARMADA_375_Z1_REV)
+                       armada_375_coherency_init_wa();
+       }
 
        bus_register_notifier(&platform_bus_type,
                              &mvebu_hwcc_platform_nb);