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[VM][PC9801][DISPLAY] .
authorK.Ohta <whatisthis.sowhat@gmail.com>
Thu, 20 Feb 2020 15:25:27 +0000 (00:25 +0900)
committerK.Ohta <whatisthis.sowhat@gmail.com>
Thu, 20 Feb 2020 15:25:27 +0000 (00:25 +0900)
source/src/vm/pc9801/display.cpp
source/src/vm/upd7220.cpp

index bb9bc0a..9b8e622 100644 (file)
@@ -255,7 +255,15 @@ void DISPLAY::initialize()
        // set vram pointer to gdc
        d_gdc_chr->set_vram_ptr(tvram, 0x2000);
        d_gdc_chr->set_screen_width(80);
+#if !defined(SUPPORT_HIRESO)
+       #if !defined(SUPPORT_2ND_VRAM)
        d_gdc_gfx->set_vram_bus_ptr(this, 0x20000);
+       #else
+       d_gdc_gfx->set_vram_bus_ptr(this, 0x40000);
+       #endif
+#else
+       d_gdc_gfx->set_vram_bus_ptr(this, 0x80000);
+#endif
        d_gdc_gfx->set_screen_width(SCREEN_WIDTH >> 3);
        
        // register event
@@ -1194,12 +1202,16 @@ uint32_t DISPLAY::read_memory_mapped_io16(uint32_t addr)
 void DISPLAY::write_dma_io8(uint32_t addr, uint32_t data)
 {
 #if defined(SUPPORT_GRCG)
-       if(grcg_mode & GRCG_CG_MODE) {
+       if(grcg_cg_mode) {
+//     if(grcg_mode & GRCG_CG_MODE) {
 #if defined(SUPPORT_EGC)
-               if(modereg2[MODE2_EGC]) {
+               if(enable_egc) {
+//             if(modereg2[MODE2_EGC]) {
+//                     out_debug_log(_T("ADDR = %08X"), addr);
                        egc_writeb(addr, data);
                } else
 #endif
+//             out_debug_log(_T("ADDR = %08X"), addr);
                grcg_writeb(addr, data);
                return;
        }
@@ -1225,9 +1237,11 @@ void DISPLAY::write_dma_io8(uint32_t addr, uint32_t data)
 void DISPLAY::write_dma_io16(uint32_t addr, uint32_t data)
 {
 #if defined(SUPPORT_GRCG)
-       if(grcg_mode & GRCG_CG_MODE) {
+       if(grcg_cg_mode) {
+//     if(grcg_mode & GRCG_CG_MODE) {
 #if defined(SUPPORT_EGC)
-               if(modereg2[MODE2_EGC]) {
+               if(enable_egc) {
+//             if(modereg2[MODE2_EGC]) {
                        egc_writew(addr, data);
                } else
 #endif
@@ -1302,9 +1316,11 @@ void DISPLAY::write_dma_io16(uint32_t addr, uint32_t data)
 uint32_t DISPLAY::read_dma_io8(uint32_t addr)
 {
 #if defined(SUPPORT_GRCG)
-       if(grcg_mode & GRCG_CG_MODE) {
+       if(grcg_cg_mode) {
+//     if(grcg_mode & GRCG_CG_MODE) {
 #if defined(SUPPORT_EGC)
-               if(modereg2[MODE2_EGC]) {
+               if(enable_egc) {
+//             if(modereg2[MODE2_EGC]) {
                        return egc_readb(addr);
                }
 #endif
@@ -1322,9 +1338,11 @@ uint32_t DISPLAY::read_dma_io8(uint32_t addr)
 uint32_t DISPLAY::read_dma_io16(uint32_t addr)
 {
 #if defined(SUPPORT_GRCG)
-       if(grcg_mode & GRCG_CG_MODE) {
+       if(grcg_cg_mode) {
+//     if(grcg_mode & GRCG_CG_MODE) {
 #if defined(SUPPORT_EGC)
-               if(modereg2[MODE2_EGC]) {
+               if(enable_egc) {
+//             if(modereg2[MODE2_EGC]) {
                        return egc_readw(addr);
                }
 #endif
@@ -2108,6 +2126,11 @@ bool DISPLAY::process_state(FILEIO* state_fio, bool loading)
        
        // post process
        if(loading) {
+#if defined(SUPPORT_16_COLORS) && defined(SUPPORT_EGC)
+               is_use_egc = ((config.dipswitch & (1 << DIPSWITCH_POSITION_EGC)) != 0);
+               enable_egc = ((is_use_egc) && (modereg2[MODE2_EGC] != 0)) ? true : false;
+#endif         
 #if defined(SUPPORT_2ND_VRAM) && !defined(SUPPORT_HIRESO)
                if(vram_disp_sel & 1) {
                        vram_disp_b = vram + 0x28000;
@@ -2131,6 +2154,8 @@ bool DISPLAY::process_state(FILEIO* state_fio, bool loading)
                }
 #endif
 #if defined(SUPPORT_GRCG)
+               grcg_cg_mode = ((grcg_mode & GRCG_CG_MODE) != 0) ? true : false;
+               grcg_rw_mode = ((grcg_mode & GRCG_RW_MODE) != 0) ? true : false;
                for(int i = 0; i < 4; i++) {
                        grcg_tile_word[i] = ((uint16_t)grcg_tile[i]) | ((uint16_t)grcg_tile[i] << 8);
                }
index db582f7..8eacabf 100644 (file)
@@ -802,20 +802,20 @@ void UPD7220::cmd_vecte()
        wrote_bytes = 1;
        
        // execute command
-       if(!(vect[0] & 0x78)) {
+       if(!(vect[0] & 0x78)) { // R, C, T, L
                pattern = ra[8] | (ra[9] << 8);
                draw_pset(dx, dy);
        }
-       if(vect[0] & 0x08) {
+       if(vect[0] & 0x08) { // L (Line)
                draw_vectl();
        }
-       if(vect[0] & 0x10) {
+       if(vect[0] & 0x10) { // T (Text)
                draw_vectt();
        }
-       if(vect[0] & 0x20) {
+       if(vect[0] & 0x20) { // C (Circle)
                draw_vectc();
        }
-       if(vect[0] & 0x40) {
+       if(vect[0] & 0x40) { // R (Rect)
                draw_vectr();
        }
        reset_vect();
@@ -1269,7 +1269,9 @@ void UPD7220::draw_vectr()
        int vx2 = vectdir[dir][2];
        int vy2 = vectdir[dir][3];
        pattern = ra[8] | (ra[9] << 8);
-       
+
+//     out_debug_log(_T("VECTR D=%d D2=%d START=%d,%d VX1,VY1,VX2,VY2 = %d,%d,%d,%d"),
+//                               d, d1, dx, dy, vx1, vy1, vx2,vy2);
        for(int i = 0; i < d; i++) {
                draw_pset(dx, dy);
                dx += vx1;
@@ -1343,15 +1345,6 @@ void UPD7220::draw_pset(int x, int y)
        pattern = (pattern >> 1) | (dot << 15);
        uint32_t addr = y * width + (x >> 3);
 
-       if((_UPD7220_UGLY_PC98_HACK)) {
-//             if(addr >= 0x8000) return;
-//             if((y == 409) && (x >= 384)) return;
-//             if(y > 409) return;
-//             if((x < 0) || (y < 0) || (x >= (width << 3))) return;
-//             addr = addr & 0x7fff;
-       } else {
-               //if((x < 0) || (y < 0) || (x >= (width << 3)) || (y >= height)) return;
-       }
        uint8_t bit;
        if(_UPD7220_MSB_FIRST) {
                bit = 0x80 >> (x & 7);