cl::desc("Disable load store optimization pass"));
static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
cl::desc("Disable if-conversion pass"));
-static cl::opt<bool> Thumb2Shrink("shrink-thumb2-instructions", cl::Hidden,
- cl::desc("Shrink 32-bit Thumb2 instructions to 16-bit ones"));
-
extern "C" void LLVMInitializeARMTarget() {
// Register the target.
RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
if (Subtarget.isThumb2()) {
PM.add(createThumb2ITBlockPass());
- if (Thumb2Shrink)
- PM.add(createThumb2SizeReductionPass());
+ PM.add(createThumb2SizeReductionPass());
}
PM.add(createARMConstantIslandPass());
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: adds r0, #171
%tmp = add i32 %a, 171
ret i32 %tmp
}
; 1179666 = 0x00120012
define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: add.w r0, r0, #1179666
%tmp = add i32 %a, 1179666
ret i32 %tmp
}
; 872428544 = 0x34003400
define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: add.w r0, r0, #872428544
%tmp = add i32 %a, 872428544
ret i32 %tmp
}
; 1448498774 = 0x56565656
define i32 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: add.w r0, r0, #1448498774
%tmp = add i32 %a, 1448498774
ret i32 %tmp
}
; 510 = 0x000001fe
define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: add.w r0, r0, #510
%tmp = add i32 %a, 510
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: add r0, r1
%tmp = add i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: add.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: add.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: add.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: add.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: ands r0, r1
%tmp = and i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: and.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: and.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: and.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: and.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {asr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: asrs r0, r1
%tmp = ashr i32 %a, %b
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {asr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#17} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: asrs r0, r0, #17
%tmp = ashr i32 %a, 17
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: bics r0, r1
%tmp = xor i32 %b, 4294967295
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: bics r0, r1
%tmp = xor i32 %b, 4294967295
%tmp1 = and i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: bics r0, r1
%tmp = xor i32 4294967295, %b
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: bics r0, r1
%tmp = xor i32 4294967295, %b
%tmp1 = and i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: bic.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = and i32 %a, %tmp1
}
define i32 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: bic.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = xor i32 %tmp, 4294967295
%tmp2 = and i32 %tmp1, %a
}
define i32 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: bic.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = xor i32 %tmp, 4294967295
%tmp2 = and i32 %a, %tmp1
}
define i32 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: bic.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*#\[0-9\]*$} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
; 0x000000bb = 187
define i1 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: cmp r0, #187
%tmp = icmp ne i32 %a, 187
ret i1 %tmp
}
; 0x00aa00aa = 11141290
define i1 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: cmp.w r0, #11141290
%tmp = icmp eq i32 %a, 11141290
ret i1 %tmp
}
; 0xcc00cc00 = 3422604288
define i1 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: cmp.w r0, #3422604288
%tmp = icmp ne i32 %a, 3422604288
ret i1 %tmp
}
; 0xdddddddd = 3722304989
define i1 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: cmp.w r0, #3722304989
%tmp = icmp ne i32 %a, 3722304989
ret i1 %tmp
}
; 0x00110000 = 1114112
define i1 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: cmp.w r0, #1114112
%tmp = icmp eq i32 %a, 1114112
ret i1 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i1 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: cmp r0, r1
%tmp = icmp ne i32 %a, %b
ret i1 %tmp
}
define i1 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: cmp r0, r1
%tmp = icmp eq i32 %a, %b
ret i1 %tmp
}
define i1 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: cmp.w r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = icmp eq i32 %tmp, %a
ret i1 %tmp1
}
define i1 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: cmp.w r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = icmp ne i32 %tmp, %a
ret i1 %tmp1
}
define i1 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: cmp.w r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = icmp eq i32 %a, %tmp
ret i1 %tmp1
}
define i1 @f9(i32 %a, i32 %b) {
+; CHECK: f9:
+; CHECK: cmp.w r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: eors r0, r1
%tmp = xor i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: eor.w r0, r1, r0
%tmp = xor i32 %b, %a
ret i32 %tmp
}
define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: eor.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = xor i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: eor.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = xor i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: eor.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = xor i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: eor.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr\\.w r0} | count 6
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr r0} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov\\.w | grep 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn\\.w
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldr\\.w | grep lsl
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr\\.w | not grep ldr
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32* %v) {
entry:
+; CHECK: f1:
+; CHECK: ldr.w r0, [r0]
%tmp = load i32* %v
ret i32 %tmp
}
define i32 @f2(i32* %v) {
entry:
+; CHECK: f2:
+; CHECK: ldr.w r0, [r0, #+4092]
%tmp2 = getelementptr i32* %v, i32 1023
%tmp = load i32* %tmp2
ret i32 %tmp
define i32 @f3(i32* %v) {
entry:
+; CHECK: f3:
+; CHECK: mov.w r1, #4096
+; CHECK: ldr.w r0, [r0, +r1]
%tmp2 = getelementptr i32* %v, i32 1024
%tmp = load i32* %tmp2
ret i32 %tmp
define i32 @f4(i32 %base) {
entry:
+; CHECK: f4:
+; CHECK: ldr r0, [r0, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i32*
%tmp3 = load i32* %tmp2
define i32 @f5(i32 %base, i32 %offset) {
entry:
+; CHECK: f5:
+; CHECK: ldr.w r0, [r0, +r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i32*
%tmp3 = load i32* %tmp2
define i32 @f6(i32 %base, i32 %offset) {
entry:
+; CHECK: f6:
+; CHECK: ldr.w r0, [r0, +r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
define i32 @f7(i32 %base, i32 %offset) {
entry:
+; CHECK: f7:
+; CHECK: lsrs r1, r1, #2
+; CHECK: ldr.w r0, [r0, +r1]
+
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb\\.w r0} | count 5
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb r0} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov\\.w | grep 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn\\.w
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb\\.w | grep lsl
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr\\.w | not grep ldrb
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i8 @f1(i8* %v) {
entry:
+; CHECK: f1:
+; CHECK: ldrb.w r0, [r0]
%tmp = load i8* %v
ret i8 %tmp
}
define i8 @f2(i8* %v) {
entry:
+; CHECK: f2:
+; CHECK: ldrb r0, [r0, #-1]
%tmp2 = getelementptr i8* %v, i8 1023
%tmp = load i8* %tmp2
ret i8 %tmp
define i8 @f3(i32 %base) {
entry:
+; CHECK: f3:
+; CHECK: mov.w r1, #4096
+; CHECK: ldrb.w r0, [r0, +r1]
%tmp1 = add i32 %base, 4096
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
define i8 @f4(i32 %base) {
entry:
+; CHECK: f4:
+; CHECK: ldrb r0, [r0, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
define i8 @f5(i32 %base, i32 %offset) {
entry:
+; CHECK: f5:
+; CHECK: ldrb.w r0, [r0, +r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
define i8 @f6(i32 %base, i32 %offset) {
entry:
+; CHECK: f6:
+; CHECK: ldrb.w r0, [r0, +r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
define i8 @f7(i32 %base, i32 %offset) {
entry:
+; CHECK: f7:
+; CHECK: lsrs r1, r1, #2
+; CHECK: ldrb.w r0, [r0, +r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh\\.w r0} | count 6
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh r0} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov\\.w | grep 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn\\.w
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh\\.w | grep lsl
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr\\.w | not grep ldrh
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i16 @f1(i16* %v) {
entry:
+; CHECK: f1:
+; CHECK: ldrh.w r0, [r0]
%tmp = load i16* %v
ret i16 %tmp
}
define i16 @f2(i16* %v) {
entry:
+; CHECK: f2:
+; CHECK: ldrh.w r0, [r0, #+2046]
%tmp2 = getelementptr i16* %v, i16 1023
%tmp = load i16* %tmp2
ret i16 %tmp
define i16 @f3(i16* %v) {
entry:
+; CHECK: f3:
+; CHECK: mov.w r1, #4096
+; CHECK: ldrh.w r0, [r0, +r1]
%tmp2 = getelementptr i16* %v, i16 2048
%tmp = load i16* %tmp2
ret i16 %tmp
define i16 @f4(i32 %base) {
entry:
+; CHECK: f4:
+; CHECK: ldrh r0, [r0, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i16*
%tmp3 = load i16* %tmp2
define i16 @f5(i32 %base, i32 %offset) {
entry:
+; CHECK: f5:
+; CHECK: ldrh.w r0, [r0, +r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i16*
%tmp3 = load i16* %tmp2
define i16 @f6(i32 %base, i32 %offset) {
entry:
+; CHECK: f6:
+; CHECK: ldrh.w r0, [r0, +r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
define i16 @f7(i32 %base, i32 %offset) {
entry:
+; CHECK: f7:
+; CHECK: lsrs r1, r1, #2
+; CHECK: ldrh.w r0, [r0, +r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsl\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*\[0-9\]} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: lsls r0, r0, #5
%tmp = shl i32 %a, 5
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsl\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: lsls r0, r1
%tmp = shl i32 %a, %b
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*\[0-9\]} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: lsrs r0, r0, #13
%tmp = lshr i32 %a, 13
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: lsrs r0, r1
%tmp = lshr i32 %a, %b
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mov\\.w\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: movs r0, #171
%tmp = add i32 0, 171
ret i32 %tmp
}
; 1179666 = 0x00120012
define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: mov.w r0, #1179666
%tmp = add i32 0, 1179666
ret i32 %tmp
}
; 872428544 = 0x34003400
define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: mov.w r0, #872428544
%tmp = add i32 0, 872428544
ret i32 %tmp
}
; 1448498774 = 0x56565656
define i32 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: mov.w r0, #1448498774
%tmp = add i32 0, 1448498774
ret i32 %tmp
}
; 66846720 = 0x03fc0000
define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: mov.w r0, #66846720
%tmp = add i32 0, 66846720
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mul\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
+; CHECK: f1:
+; CHECK: muls r0, r1
%tmp = mul i32 %a, %b
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc | grep {mvn\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112} | count 4
-
-target triple = "thumbv7-apple-darwin"
+; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: mvn r0, #187
%tmp = xor i32 4294967295, 187
ret i32 %tmp
}
; 0x00aa00aa = 11141290
define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: mvn r0, #11141290
%tmp = xor i32 4294967295, 11141290
ret i32 %tmp
}
; 0xcc00cc00 = 3422604288
define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: mvn r0, #3422604288
%tmp = xor i32 4294967295, 3422604288
ret i32 %tmp
}
; 0x00110000 = 1114112
define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: mvn r0, #1114112
%tmp = xor i32 4294967295, 1114112
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: mvns r0, r0
%tmp = xor i32 4294967295, %a
ret i32 %tmp
}
define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: mvns r0, r0
%tmp = xor i32 %a, 4294967295
ret i32 %tmp
}
define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: mvn.w r0, r0, lsl #5
%tmp = shl i32 %a, 5
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}
define i32 @f6(i32 %a) {
+; CHECK: f6:
+; CHECK: mvn.w r0, r0, lsr #6
%tmp = lshr i32 %a, 6
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}
define i32 @f7(i32 %a) {
+; CHECK: f7:
+; CHECK: mvn.w r0, r0, asr #7
%tmp = ashr i32 %a, 7
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}
define i32 @f8(i32 %a) {
+; CHECK: f8:
+; CHECK: mvn.w r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: orrs r0, r1
%tmp2 = or i32 %a, %b
ret i32 %tmp2
}
define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: orr.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: orr.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: orr.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: orr.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2,+v7a | grep {rev\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2,+v7a | FileCheck %s
define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: rev r0, r0
%tmp = tail call i32 @llvm.bswap.i32(i32 %a)
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ror\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: rors r0, r1
%db = sub i32 32, %b
%l8 = shl i32 %a, %b
%r8 = lshr i32 %a, %db
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
; CHECK: f1:
-; CHECK: sub.w r0, r0, #171
+; CHECK: subs r0, #171
%tmp = sub i32 %a, 171
ret i32 %tmp
}
; Don't change this to an add.
define i32 @f6(i32 %a) {
; CHECK: f6:
-; CHECK: sub.w r0, r0, #1
+; CHECK: subs r0, #1
%tmp = sub i32 %a, 1
ret i32 %tmp
}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: subs r0, r0, r1
%tmp = sub i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: sub.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: sub.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: sub.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: sub.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i1 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: tst r0, r1
%tmp = and i32 %a, %b
%tmp1 = icmp ne i32 %tmp, 0
ret i1 %tmp1
}
define i1 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: tst r0, r1
%tmp = and i32 %a, %b
%tmp1 = icmp eq i32 %tmp, 0
ret i1 %tmp1
}
define i1 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: tst r0, r1
%tmp = and i32 %a, %b
%tmp1 = icmp ne i32 0, %tmp
ret i1 %tmp1
}
define i1 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: tst r0, r1
%tmp = and i32 %a, %b
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
define i1 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: tst.w r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
}
define i1 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: tst.w r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
}
define i1 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: tst.w r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
}
define i1 @f9(i32 %a, i32 %b) {
+; CHECK: f9:
+; CHECK: tst.w r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8