rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0300, state);
}
-static void rtw_coex_set_table(struct rtw_dev *rtwdev, u32 table0, u32 table1)
+static void rtw_coex_set_table(struct rtw_dev *rtwdev, bool force, u32 table0,
+ u32 table1)
{
#define DEF_BRK_TABLE_VAL 0xf0ffffff
+ struct rtw_coex *coex = &rtwdev->coex;
+ struct rtw_coex_dm *coex_dm = &coex->dm;
+
+ /* If last tdma is wl slot toggle, force write table*/
+ if (!force && coex_dm->reason != COEX_RSN_LPS) {
+ if (table0 == rtw_read32(rtwdev, REG_BT_COEX_TABLE0) &&
+ table1 == rtw_read32(rtwdev, REG_BT_COEX_TABLE1))
+ return;
+ }
rtw_write32(rtwdev, REG_BT_COEX_TABLE0, table0);
rtw_write32(rtwdev, REG_BT_COEX_TABLE1, table1);
rtw_write32(rtwdev, REG_BT_COEX_BRK_TABLE, DEF_BRK_TABLE_VAL);
table1);
}
-static void rtw_coex_table(struct rtw_dev *rtwdev, u8 type)
+static void rtw_coex_table(struct rtw_dev *rtwdev, bool force, u8 type)
{
struct rtw_coex *coex = &rtwdev->coex;
struct rtw_coex_dm *coex_dm = &coex->dm;
if (efuse->share_ant) {
if (type < chip->table_sant_num)
- rtw_coex_set_table(rtwdev,
+ rtw_coex_set_table(rtwdev, force,
chip->table_sant[type].bt,
chip->table_sant[type].wl);
} else {
type = type - 100;
if (type < chip->table_nsant_num)
- rtw_coex_set_table(rtwdev,
+ rtw_coex_set_table(rtwdev, force,
chip->table_nsant[type].bt,
chip->table_nsant[type].wl);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
else
rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[level]);
- rtw_coex_table(rtwdev, 100);
+ rtw_coex_table(rtwdev, false, 100);
rtw_coex_tdma(rtwdev, false, 100);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
if (table_case != 0xff && tdma_case != 0xff) {
rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G_FREERUN);
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
return;
}
}
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], wifi hi(%d), bt page(%d)\n",
wl_hi_pri, coex_stat->bt_page);
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
}
}
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
}
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 113;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
}
}
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 119;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 113;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
}
tdma_case = 120;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 119;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 120;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
}
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
}
tdma_case = 100;
}
- rtw_coex_table(rtwdev, table_case);
+ rtw_coex_table(rtwdev, false, table_case);
rtw_coex_tdma(rtwdev, false, tdma_case);
}
}
/* PTA parameter */
- rtw_coex_table(rtwdev, 0);
+ rtw_coex_table(rtwdev, false, 0);
rtw_coex_tdma(rtwdev, true, 0);
rtw_coex_query_bt_info(rtwdev);
}