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drm/i915: Move shared DPLL disabling into CRTC disable hook
authorImre Deak <imre.deak@intel.com>
Thu, 23 Mar 2023 14:20:32 +0000 (16:20 +0200)
committerImre Deak <imre.deak@intel.com>
Mon, 3 Apr 2023 08:35:31 +0000 (11:35 +0300)
The spec requires disabling the PLL on TC ports before disconnecting the
port's PHY. Prepare for that by moving the PLL disabling to the CRTC
disable hook, while disconnecting the PHY will be moved to the
post_pll_disable() encoder hook in the next patch.

v2: Move the call from intel_crtc_disable_noatomic() as well.

Reviewed-by: Mika Kahola <mika.kahola@intel.com> # v1
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-27-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_modeset_setup.c

index b53a1d9..1ed584d 100644 (file)
@@ -1905,6 +1905,8 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 
        intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
        intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
+
+       intel_disable_shared_dpll(old_crtc_state);
 }
 
 static void hsw_crtc_disable(struct intel_atomic_state *state,
@@ -1923,6 +1925,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
                intel_encoders_post_disable(state, crtc);
        }
 
+       intel_disable_shared_dpll(old_crtc_state);
+
        intel_dmc_disable_pipe(i915, crtc->pipe);
 }
 
@@ -7041,7 +7045,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
        dev_priv->display.funcs.display->crtc_disable(state, crtc);
        crtc->active = false;
        intel_fbc_disable(crtc);
-       intel_disable_shared_dpll(old_crtc_state);
 
        if (!new_crtc_state->hw.active)
                intel_initial_watermarks(state, crtc);
index 4558d02..134b943 100644 (file)
@@ -100,7 +100,6 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
 
        intel_fbc_disable(crtc);
        intel_update_watermarks(i915);
-       intel_disable_shared_dpll(crtc_state);
 
        intel_display_power_put_all_in_set(i915, &crtc->enabled_power_domains);