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drm/msm/a6xx: Fix misleading comment
authorRob Clark <robdclark@chromium.org>
Fri, 30 Jun 2023 16:20:43 +0000 (09:20 -0700)
committerRob Clark <robdclark@chromium.org>
Mon, 7 Aug 2023 21:28:06 +0000 (14:28 -0700)
The range is actually len+1.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/545099/

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

index c788b06..ab66d28 100644 (file)
@@ -39,8 +39,8 @@ struct a6xx_gpu {
 
 /*
  * Given a register and a count, return a value to program into
- * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len
- * registers starting at _reg.
+ * REG_CP_PROTECT_REG(n) - this will block both reads and writes for
+ * _len + 1 registers starting at _reg.
  */
 #define A6XX_PROTECT_NORDWR(_reg, _len) \
        ((1 << 31) | \