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ARM: shmobile: emev2: Use interrupt macros in DT files
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Thu, 28 Nov 2013 16:37:50 +0000 (17:37 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 10 Dec 2013 08:27:20 +0000 (17:27 +0900)
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/emev2-kzm9d.dts
arch/arm/boot/dts/emev2.dtsi

index baaa66c..50ccd15 100644 (file)
@@ -12,6 +12,7 @@
 #include "emev2.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
        model = "EMEV2 KZM9D Board";
@@ -49,7 +50,7 @@
                reg = <0x20000000 0x10000>;
                phy-mode = "mii";
                interrupt-parent = <&gpio0>;
-               interrupts = <1 1>;     /* active high */
+               interrupts = <1 IRQ_TYPE_EDGE_RISING>;
                reg-io-width = <4>;
                smsc,irq-active-high;
                smsc,irq-push-pull;
index 256c2f8..8467e4c 100644 (file)
@@ -9,6 +9,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
        compatible = "renesas,emev2";
@@ -48,8 +49,8 @@
 
        pmu {
                compatible = "arm,cortex-a9-pmu";
-               interrupts = <0 120 4>,
-                            <0 121 4>;
+               interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 121 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        smu@e0110000 {
        sti@e0180000 {
                compatible = "renesas,em-sti";
                reg = <0xe0180000 0x54>;
-               interrupts = <0 125 0>;
+               interrupts = <0 125 IRQ_TYPE_NONE>;
                clocks = <&sti_sclk>;
                clock-names = "sclk";
        };
        uart@e1020000 {
                compatible = "renesas,em-uart";
                reg = <0xe1020000 0x38>;
-               interrupts = <0 8 0>;
+               interrupts = <0 8 IRQ_TYPE_NONE>;
                clocks = <&usia_u0_sclk>;
                clock-names = "sclk";
        };
        uart@e1030000 {
                compatible = "renesas,em-uart";
                reg = <0xe1030000 0x38>;
-               interrupts = <0 9 0>;
+               interrupts = <0 9 IRQ_TYPE_NONE>;
                clocks = <&usib_u1_sclk>;
                clock-names = "sclk";
        };
        uart@e1040000 {
                compatible = "renesas,em-uart";
                reg = <0xe1040000 0x38>;
-               interrupts = <0 10 0>;
+               interrupts = <0 10 IRQ_TYPE_NONE>;
                clocks = <&usib_u2_sclk>;
                clock-names = "sclk";
        };
        uart@e1050000 {
                compatible = "renesas,em-uart";
                reg = <0xe1050000 0x38>;
-               interrupts = <0 11 0>;
+               interrupts = <0 11 IRQ_TYPE_NONE>;
                clocks = <&usib_u3_sclk>;
                clock-names = "sclk";
        };
        gpio0: gpio@e0050000 {
                compatible = "renesas,em-gio";
                reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
-               interrupts = <0 67 0>, <0 68 0>;
+               interrupts = <0 67 IRQ_TYPE_NONE>,
+                            <0 68 IRQ_TYPE_NONE>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
        gpio1: gpio@e0050080 {
                compatible = "renesas,em-gio";
                reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
-               interrupts = <0 69 0>, <0 70 0>;
+               interrupts = <0 69 IRQ_TYPE_NONE>,
+                            <0 70 IRQ_TYPE_NONE>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
        gpio2: gpio@e0050100 {
                compatible = "renesas,em-gio";
                reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
-               interrupts = <0 71 0>, <0 72 0>;
+               interrupts = <0 71 IRQ_TYPE_NONE>,
+                            <0 72 IRQ_TYPE_NONE>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
        gpio3: gpio@e0050180 {
                compatible = "renesas,em-gio";
                reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
-               interrupts = <0 73 0>, <0 74 0>;
+               interrupts = <0 73 IRQ_TYPE_NONE>,
+                            <0 74 IRQ_TYPE_NONE>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
        gpio4: gpio@e0050200 {
                compatible = "renesas,em-gio";
                reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
-               interrupts = <0 75 0>, <0 76 0>;
+               interrupts = <0 75 IRQ_TYPE_NONE>,
+                            <0 76 IRQ_TYPE_NONE>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <31>;