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drm/amd/display: Loading NV10/14 Bounding Box Data Directly From Code
authorZhan Liu <zhan.liu@amd.com>
Tue, 3 Dec 2019 17:46:01 +0000 (12:46 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 3 Dec 2019 21:26:31 +0000 (16:26 -0500)
[Why]
NV10/14 has released. Its time to get NV10/14 bounding box
directly from code.

[How]
Retrieve NV10/14 bounding box data directly from code.

Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

index 2ccfd84..2a158ff 100644 (file)
@@ -83,8 +83,6 @@
 
 #include "amdgpu_socbb.h"
 
-/* NV12 SOC BB is currently in FW, mark SW bounding box invalid. */
-#define SOC_BOUNDING_BOX_VALID false
 #define DC_LOGGER_INIT(logger)
 
 struct _vcs_dpi_ip_params_st dcn2_0_ip = {
@@ -3271,12 +3269,13 @@ static bool init_soc_bounding_box(struct dc *dc,
 
        DC_LOGGER_INIT(dc->ctx->logger);
 
-       if (!bb && !SOC_BOUNDING_BOX_VALID) {
+       /* TODO: upstream NV12 bounding box when its launched */
+       if (!bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
                DC_LOG_ERROR("%s: not valid soc bounding box/n", __func__);
                return false;
        }
 
-       if (bb && !SOC_BOUNDING_BOX_VALID) {
+       if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
                int i;
 
                dcn2_0_nv12_soc.sr_exit_time_us =