dev_err(dai->component->dev,
"%s: ERROR: The device is either a master or a slave.\n",
__func__);
- /* fall through */
+ fallthrough;
default:
dev_err(dai->component->dev,
"%s: ERROR: Unsupporter master mask 0x%x\n",
ARRAY_SIZE(adau1761_jack_detect_controls));
if (ret)
return ret;
- /* fall through */
+ fallthrough;
case ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE:
ret = snd_soc_dapm_add_routes(dapm, adau1761_no_dmic_routes,
ARRAY_SIZE(adau1761_no_dmic_routes));
ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE,
ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE);
- /* fallthrough */
+ fallthrough;
case ADAU1761_OUTPUT_MODE_HEADPHONE:
regmap_update_bits(adau->regmap, ADAU1761_PLAY_HP_RIGHT_VOL,
ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP,
case ADAU17X1_CLK_SRC_PLL_AUTO:
if (!adau->mclk)
return -EINVAL;
- /* Fall-through */
+ fallthrough;
case ADAU17X1_CLK_SRC_PLL:
is_pll = true;
break;
ret = adau17x1_auto_pll(dai, params);
if (ret)
return ret;
- /* Fall-through */
+ fallthrough;
case ADAU17X1_CLK_SRC_PLL:
freq = adau->pll_freq;
break;
pll_ctrl1 |= ADAV80X_PLL_CTRL1_PLLDIV;
break;
}
- /* fall through */
+ fallthrough;
default:
return -EINVAL;
}
switch (level) {
case SND_SOC_BIAS_ON:
mgmt1 |= RSTN;
- /* fall through */
+ fallthrough;
case SND_SOC_BIAS_PREPARE:
mgmt1 |= PMADC | PMDAC;
- /* fall through */
+ fallthrough;
case SND_SOC_BIAS_STANDBY:
mgmt1 |= PMVR;
- /* fall through */
+ fallthrough;
case SND_SOC_BIAS_OFF:
default:
break;
break;
case 22579200:
mclkdiv2 = 1;
- /* fall through */
+ fallthrough;
case 11289600:
es8328->sysclk_constraints = &constraints_11289;
es8328->mclk_ratios = ratios_11289;
break;
case 24576000:
mclkdiv2 = 1;
- /* fall through */
+ fallthrough;
case 12288000:
es8328->sysclk_constraints = &constraints_12288;
es8328->mclk_ratios = ratios_12288;
return -EINVAL;
}
ifc1a ^= MAX9860_WCI;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_IB_NF:
ifc1a ^= MAX9860_DBCI;
ifc1b ^= MAX9860_ABCI;
case CDC_A_TX_2_EN:
snd_soc_component_update_bits(component, CDC_A_MICB_1_CTL,
MICB_1_CTL_CFILT_REF_SEL_MASK, 0);
- /* fall through */
+ fallthrough;
case CDC_A_TX_3_EN:
snd_soc_component_update_bits(component, CDC_D_CDC_CONN_TX2_CTL,
CONN_TX2_SERIAL_TX2_MUX,
break;
default:
dev_warn(component->dev, "invalid pll source, use BCLK\n");
- /* fall through */
+ fallthrough;
case RT274_PLL2_S_BCLK:
snd_soc_component_update_bits(component, RT274_PLL2_CTRL,
RT274_PLL2_SRC_MASK, RT274_PLL2_SRC_BCLK);
break;
default:
dev_warn(component->dev, "invalid freq_in, assume 4.8M\n");
- /* fall through */
+ fallthrough;
case 100:
snd_soc_component_write(component, 0x7a, 0xaab6);
snd_soc_component_write(component, 0x7b, 0x0301);
break;
case RT5640_IF_113:
ret |= RT5640_U_IF1;
- /* fall through */
+ fallthrough;
case RT5640_IF_312:
case RT5640_IF_213:
ret |= RT5640_U_IF2;
break;
case RT5640_IF_223:
ret |= RT5640_U_IF1;
- /* fall through */
+ fallthrough;
case RT5640_IF_123:
case RT5640_IF_321:
ret |= RT5640_U_IF2;
break;
case 25:
slot_width_25 = 0x8080;
- /* fall through */
+ fallthrough;
case 24:
val |= (2 << 8);
break;
switch (params_width(params)) {
case 24:
dev_dbg(component->dev, "24bit\n");
- /* fall through */
+ fallthrough;
case 32:
dev_dbg(component->dev, "24bit or 32bit\n");
switch (sta32x->format) {
switch (params_width(params)) {
case 24:
dev_dbg(component->dev, "24bit\n");
- /* fall through */
+ fallthrough;
case 32:
dev_dbg(component->dev, "24bit or 32bit\n");
switch (sta350->format) {
clk_id = TAS2552_PLL_CLKIN_BCLK;
freq = 0;
}
- /* fall through */
+ fallthrough;
case TAS2552_PLL_CLKIN_BCLK:
case TAS2552_PLL_CLKIN_1_8_FIXED:
mask = TAS2552_PLL_SRC_MASK;
break;
case SND_SOC_DAIFMT_DSP_A:
iface_reg |= TLV320AIC23_LRP_ON;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_B:
iface_reg |= TLV320AIC23_FOR_DSP;
break;
case SND_SOC_DAIFMT_I2S:
break;
case SND_SOC_DAIFMT_DSP_A:
- dsp_a_val = 0x1; /* fall through */
+ dsp_a_val = 0x1;
+ fallthrough;
case SND_SOC_DAIFMT_DSP_B:
/*
* NOTE: This CODEC samples on the falling edge of BCLK in
default:
dev_warn(dev, "Unknown TPA model (%d). Assuming 6130A2\n",
data->id);
- /* fall through */
+ fallthrough;
case TPA6130A2:
regulator = "Vdd";
break;
case SND_SOC_DAIFMT_CBS_CFS:
break;
case SND_SOC_DAIFMT_CBM_CFM:
- ioctl |= 0x2; /* fall through */
+ ioctl |= 0x2;
+ fallthrough;
case SND_SOC_DAIFMT_CBM_CFS:
voice |= 0x0040;
break;
case SND_SOC_DAIFMT_CBS_CFS:
break;
case SND_SOC_DAIFMT_CBM_CFM:
- ioctl |= 0x1; /* fall through */
+ ioctl |= 0x1;
+ fallthrough;
case SND_SOC_DAIFMT_CBM_CFS:
hifi |= 0x0040;
break;
* We assume the controller imposes no restrictions,
* so we are able to select active-high
*/
- /* Fall-through */
+ fallthrough;
case IRQ_TYPE_LEVEL_HIGH:
pdata->irq_active_low = false;
break;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B:
aif1 |= 0x3 | WM8904_AIF_LRCLK_INV;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif1 |= 0x3;
break;
break;
}
clk_id = WM8904_CLK_MCLK;
- /* fallthrough */
+ fallthrough;
case WM8904_CLK_MCLK:
priv->sysclk_src = clk_id;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B:
aif |= WM8955_LRP;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif |= 0x3;
break;
iface |= 0x000c;
break;
}
- /* fall through */
+ fallthrough;
default:
dev_err(component->dev, "unsupported width %d\n",
params_width(params));
case SND_SOC_DAIFMT_DSP_B:
aif |= WM8961_LRP;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif |= 3;
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B:
aif0 |= WM8962_LRCLK_INV | 3;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif0 |= 3;
switch (clk_id) {
case WM8993_SYSCLK_MCLK:
wm8993->mclk_rate = freq;
- /* fall through */
+ fallthrough;
case WM8993_SYSCLK_FLL:
wm8993->sysclk_source = clk_id;
break;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B:
aif1 |= WM8993_AIF_LRCLK_INV;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif1 |= 0x18;
break;
switch (wm8994->vmid_mode) {
default:
WARN_ON(NULL == "Invalid VMID mode");
- /* fall through */
+ fallthrough;
case WM8994_VMID_NORMAL:
/* Startup bias, VMID ramp & buffer */
snd_soc_component_update_bits(component, WM8994_ANTIPOP_2,
case SND_SOC_DAIFMT_DSP_B:
aif1 |= WM8994_AIF1_LRCLK_INV;
lrclk |= WM8958_AIF1_LRCLK_INV;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif1 |= 0x18;
break;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B:
aif |= WM8995_AIF1_LRCLK_INV;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif |= (0x3 << WM8995_AIF1_FMT_SHIFT);
break;
case 24576000:
ratediv = WM8996_SYSCLK_DIV;
wm8996->sysclk /= 2;
- /* fall through */
+ fallthrough;
case 11289600:
case 12288000:
snd_soc_component_update_bits(component, WM8996_AIF_RATE,
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B:
aif2 |= WM9081_AIF_LRCLK_INV;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif2 |= 0x3;
break;