OSDN Git Service

i965: add support for Intel 4 series chipsets
authorXiang, Haihao <haihao.xiang@intel.com>
Wed, 18 Jun 2008 07:33:33 +0000 (15:33 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Wed, 18 Jun 2008 07:33:33 +0000 (15:33 +0800)
src/mesa/drivers/dri/intel/intel_chipset.h
src/mesa/drivers/dri/intel/intel_context.c

index 3c8fd23..4a51662 100644 (file)
 #define PCI_CHIP_I965_GM                0x2A02
 #define PCI_CHIP_I965_GME               0x2A12
 
-#define PCI_CHIP_IGD_GM       0x2A42
+#define PCI_CHIP_IGD_GM                 0x2A42
+
+#define PCI_CHIP_IGD_E_G                0x2E02
+#define PCI_CHIP_Q45_G                  0x2E12
+#define PCI_CHIP_G45_G                  0x2E22
 
 #define IS_MOBILE(devid)       (devid == PCI_CHIP_I855_GM || \
                                 devid == PCI_CHIP_I915_GM || \
                                 devid == PCI_CHIP_I965_GME || \
                                 devid == PCI_CHIP_IGD_GM)
 
-#define IS_IGD(devid)  (devid == PCI_CHIP_IGD_GM)
+#define IS_IGD_GM(devid)        (devid == PCI_CHIP_IGD_GM)
+#define IS_G4X(devid)           (devid == PCI_CHIP_IGD_E_G || \
+                                 devid == PCI_CHIP_Q45_G || \
+                                 devid == PCI_CHIP_G45_G)
+#define IS_IGD(devid)           (IS_IGD_GM(devid) || IS_G4X(devid))
 
 #define IS_915(devid)          (devid == PCI_CHIP_I915_G || \
                                 devid == PCI_CHIP_E7221_G || \
index 47e7d1a..80e2111 100644 (file)
@@ -167,8 +167,15 @@ intelGetString(GLcontext * ctx, GLenum name)
         chipset = "Intel(R) 965GME/GLE";
         break;
       case PCI_CHIP_IGD_GM:
+      case PCI_CHIP_IGD_E_G:
         chipset = "Intel(R) Integrated Graphics Device";
         break;
+      case PCI_CHIP_G45_G:
+         chipset = "Intel(R) G45/G43";
+         break;
+      case PCI_CHIP_Q45_G:
+         chipset = "Intel(R) Q45/Q43";
+         break;
       default:
          chipset = "Unknown Intel Chipset";
          break;