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target-microblaze: Don't hard code 0xb as initial MB version
author
Edgar E. Iglesias
<edgar.iglesias@xilinx.com>
Tue, 10 Jan 2017 16:24:01 +0000
(17:24 +0100)
committer
Edgar E. Iglesias
<edgar.iglesias@xilinx.com>
Tue, 4 Jul 2017 07:22:20 +0000
(09:22 +0200)
Don't hard code 0xb as initial MB version.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
target/microblaze/cpu.c
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diff --git
a/target/microblaze/cpu.c
b/target/microblaze/cpu.c
index
af70faa
..
4bc77df
100644
(file)
--- a/
target/microblaze/cpu.c
+++ b/
target/microblaze/cpu.c
@@
-152,8
+152,7
@@
static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
| PVR0_USE_HW_MUL_MASK \
| PVR0_USE_EXC_MASK \
| PVR0_USE_ICACHE_MASK \
- | PVR0_USE_DCACHE_MASK \
- | (0xb << 8);
+ | PVR0_USE_DCACHE_MASK;
env->pvr.regs[2] = PVR2_D_OPB_MASK \
| PVR2_D_LMB_MASK \
| PVR2_I_OPB_MASK \