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[media] cx231xx : Add support for OTG102 aka EZGrabber2
authorMatt Gomboc <gomboc0@gmail.com>
Fri, 1 Mar 2013 22:53:30 +0000 (19:53 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 18 Mar 2013 20:22:55 +0000 (17:22 -0300)
Thanks for the response, I have done as you suggested.
Below is an updated patch for the OTG102 device against http://git.linuxtv.org/hverkuil/media_tree.git/shortlog/refs/heads/cx231xx, kernel version 3.8.
With further testing it appears the extra clauses in cx231xx-cards.c were not necessary (in static in cx231xx_init_dev and static int cx231xx_usb_probe), so those have been also been removed.

Signed-off-by: Matt Gomboc <gomboc0@gmail.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/usb/cx231xx/cx231xx-avcore.c
drivers/media/usb/cx231xx/cx231xx-cards.c
drivers/media/usb/cx231xx/cx231xx.h

index 2e51fb9..235ba65 100644 (file)
@@ -357,6 +357,7 @@ int cx231xx_afe_update_power_control(struct cx231xx *dev,
        case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
        case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
        case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
+       case CX231XX_BOARD_OTG102:
                if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
                        while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
                                                FLD_PWRDN_ENABLE_PLL)) {
@@ -1720,6 +1721,7 @@ int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard)
        case CX231XX_BOARD_CNXT_RDU_250:
        case CX231XX_BOARD_CNXT_VIDEO_GRABBER:
        case CX231XX_BOARD_HAUPPAUGE_EXETER:
+       case CX231XX_BOARD_OTG102:
                func_mode = 0x03;
                break;
        case CX231XX_BOARD_CNXT_RDE_253S:
index b7b1acd..13249e5 100644 (file)
@@ -634,6 +634,39 @@ struct cx231xx_board cx231xx_boards[] = {
                        .gpio = NULL,
                } },
        },
+       [CX231XX_BOARD_OTG102] = {
+               .name = "Geniatech OTG102",
+               .tuner_type = TUNER_ABSENT,
+               .decoder = CX231XX_AVDECODER,
+               .output_mode = OUT_MODE_VIP11,
+               .ctl_pin_status_mask = 0xFFFFFFC4,
+               .agc_analog_digital_select_gpio = 0x0c, 
+                       /* According with PV CxPlrCAP.inf file */
+               .gpio_pin_status_mask = 0x4001000,
+               .norm = V4L2_STD_NTSC,
+               .no_alt_vanc = 1,
+               .external_av = 1,
+               .dont_use_port_3 = 1,
+               /*.has_417 = 1, */
+               /* This board is believed to have a hardware encoding chip
+                * supporting mpeg1/2/4, but as the 417 is apparently not
+                * working for the reference board it is not here either. */
+
+               .input = {{
+                               .type = CX231XX_VMUX_COMPOSITE1,
+                               .vmux = CX231XX_VIN_2_1,
+                               .amux = CX231XX_AMUX_LINE_IN,
+                               .gpio = NULL,
+                       }, {
+                               .type = CX231XX_VMUX_SVIDEO,
+                               .vmux = CX231XX_VIN_1_1 |
+                                       (CX231XX_VIN_1_2 << 8) |
+                                       CX25840_SVIDEO_ON,
+                               .amux = CX231XX_AMUX_LINE_IN,
+                               .gpio = NULL,
+                       }
+               },
+       },
 };
 const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards);
 
@@ -675,6 +708,8 @@ struct usb_device_id cx231xx_id_table[] = {
         .driver_info = CX231XX_BOARD_ICONBIT_U100},
        {USB_DEVICE(0x0fd9, 0x0037),
         .driver_info = CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2},
+       {USB_DEVICE(0x1f4d, 0x0102),
+        .driver_info = CX231XX_BOARD_OTG102},
        {},
 };
 
index a8e50d2..dff3f1d 100644 (file)
@@ -71,6 +71,7 @@
 #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
 #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
 #define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
+#define CX231XX_BOARD_OTG102 17
 
 /* Limits minimum and default number of buffers */
 #define CX231XX_MIN_BUF                 4