drm/amd/display: Fix two MST not light up regressions

1. Change 100104: Move verify link cap after read edid causes MST
   link_cap struct not being set. It leads to zero denominator
   pbn_per_slot value, leading to the crash at
   dal_fixed31_32_div(). Skip MST link training for now and will
   need to add MST specific link traning routine later.

2. Change 98822: Adding edp supports changes link setting
   condition from max_link to verified_link. It leads to MST is
   getting wrong link settings.
   e.g. LINK_SPREAD_05_DOWNSPREAD_30KHZ not set in MST case

Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index cab54af..ee9b984 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -607,6 +607,12 @@ bool dc_link_detect(struct dc_link *link, bool boot)
                        if (link->type == dc_connection_mst_branch) {
                                LINK_INFO("link=%d, mst branch is now Connected\n",
                                        link->link_index);
+                               /* Need to setup mst link_cap struct here
+                                * otherwise dc_link_detect() will leave mst link_cap
+                                * empty which leads to allocate_mst_payload() has "0"
+                                * pbn_per_slot value leading to exception on dal_fixed31_32_div()
+                                */
+                               link->verified_link_cap = link->reported_link_cap;
                                return false;
                        }
 
@@ -672,13 +678,9 @@ bool dc_link_detect(struct dc_link *link, bool boot)
                         * TODO debug why Dell 2413 doesn't like
                         *  two link trainings
                         */
-                       if (is_mst_supported(link)) {
-                               link->verified_link_cap =
-                                               link->reported_link_cap;
-                       } else {
-                               dp_hbr_verify_link_cap(link,
-                                   &link->reported_link_cap);
-                       }
+
+                       /* deal with non-mst cases */
+                       dp_hbr_verify_link_cap(link, &link->reported_link_cap);
                }
 
                /* HDMI-DVI Dongle */

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index d621237..e35bdce 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1459,6 +1459,14 @@ void decide_link_settings(struct dc_stream_state *stream,
                return;
        }
 
+       /* MST doesn't perform link training for now
+        * TODO: add MST specific link training routine
+        */
+       if (is_mst_supported(link)) {
+               *link_setting = link->verified_link_cap;
+               return;
+       }
+
     /* search for the minimum link setting that:
      * 1. is supported according to the link training result
      * 2. could support the b/w requested by the timing