/* Copyright (C) 1991,92,93,95,96,97,98,99,2001,02
- Free Software Foundation, Inc.
+ Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
#define R_NIOS2_PCREL16 3
#define R_NIOS2_CALL26 4
#define R_NIOS2_IMM5 5
-#define R_NIOS2_CACHE_OPX 6
+#define R_NIOS2_CACHE_OPX 6
#define R_NIOS2_IMM6 7
#define R_NIOS2_IMM8 8
#define R_NIOS2_HI16 9
#define R_NIOS2_LO16 10
-#define R_NIOS2_HIADJ16 11
+#define R_NIOS2_HIADJ16 11
#define R_NIOS2_BFD_RELOC_32 12
#define R_NIOS2_BFD_RELOC_16 13
-#define R_NIOS2_BFD_RELOC_8 14
+#define R_NIOS2_BFD_RELOC_8 14
#define R_NIOS2_GPREL 15
-#define R_NIOS2_GNU_VTINHERIT 16
-#define R_NIOS2_GNU_VTENTRY 17
+#define R_NIOS2_GNU_VTINHERIT 16
+#define R_NIOS2_GNU_VTENTRY 17
#define R_NIOS2_UJMP 18
#define R_NIOS2_CJMP 19
#define R_NIOS2_CALLR 20
# ifdef HAVE_ASM_SET_DIRECTIVE
# ifdef HAVE_ASM_GLOBAL_DOT_NAME
# define _hidden_strong_alias(original, alias) \
- ASM_GLOBAL_DIRECTIVE C_SYMBOL_NAME(alias) ASM_LINE_SEP \
+ ASM_GLOBAL_DIRECTIVE C_SYMBOL_NAME(alias) ASM_LINE_SEP \
.hidden C_SYMBOL_NAME(alias) ASM_LINE_SEP \
.set C_SYMBOL_NAME(alias),C_SYMBOL_NAME(original) ASM_LINE_SEP \
ASM_GLOBAL_DIRECTIVE C_SYMBOL_DOT_NAME(alias) ASM_LINE_SEP \
*/
#define TSPVERSION 1
-#define ANYADDR NULL
+#define ANYADDR NULL
struct tsp {
u_char tsp_type;
*/
struct __res_state {
#ifdef __UCLIBC_HAS_COMPAT_RES_STATE__
- int retrans; /* retransmission time interval */
+ int retrans; /* retransmission time interval */
int retry; /* number of times to retransmit */
#endif
u_int32_t options; /* (was: ulong) option flags - see below. */
int (*ah_validate) (AUTH *, struct opaque_auth *);
/* validate verifier */
int (*ah_refresh) (AUTH *); /* refresh credentials */
- void (*ah_destroy) (AUTH *); /* destroy this structure */
+ void (*ah_destroy) (AUTH *); /* destroy this structure */
} *ah_ops;
caddr_t ah_private;
};
/* Operations for the `flock' call. */
#define LOCK_SH 1 /* Shared lock. */
-#define LOCK_EX 2 /* Exclusive lock. */
+#define LOCK_EX 2 /* Exclusive lock. */
#define LOCK_UN 8 /* Unlock. */
/* Can be OR'd in to one of the above. */
if (LIST_NEXT((elm), field) != NULL && \
LIST_NEXT((elm), field)->field.le_prev != \
&((elm)->field.le_next)) \
- panic("Bad link elm %p next->prev != elm", (elm)); \
+ panic("Bad link elm %p next->prev != elm", (elm)); \
} while (0)
#define QMD_LIST_CHECK_PREV(elm, field) do { \
QMD_LIST_CHECK_NEXT(elm, field); \
QMD_LIST_CHECK_PREV(elm, field); \
if (LIST_NEXT((elm), field) != NULL) \
- LIST_NEXT((elm), field)->field.le_prev = \
+ LIST_NEXT((elm), field)->field.le_prev = \
(elm)->field.le_prev; \
*(elm)->field.le_prev = LIST_NEXT((elm), field); \
TRASHIT((elm)->field.le_next); \
#define QMD_TAILQ_CHECK_TAIL(head, field) do { \
if (*(head)->tqh_last != NULL) \
- panic("Bad tailq NEXT(%p->tqh_last) != NULL", (head)); \
+ panic("Bad tailq NEXT(%p->tqh_last) != NULL", (head)); \
} while (0)
#define QMD_TAILQ_CHECK_NEXT(elm, field) do { \
#define TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \
QMD_TAILQ_CHECK_NEXT(listelm, field); \
if ((TAILQ_NEXT((elm), field) = TAILQ_NEXT((listelm), field)) != NULL)\
- TAILQ_NEXT((elm), field)->field.tqe_prev = \
+ TAILQ_NEXT((elm), field)->field.tqe_prev = \
&TAILQ_NEXT((elm), field); \
else { \
(head)->tqh_last = &TAILQ_NEXT((elm), field); \
QMD_TAILQ_CHECK_NEXT(elm, field); \
QMD_TAILQ_CHECK_PREV(elm, field); \
if ((TAILQ_NEXT((elm), field)) != NULL) \
- TAILQ_NEXT((elm), field)->field.tqe_prev = \
+ TAILQ_NEXT((elm), field)->field.tqe_prev = \
(elm)->field.tqe_prev; \
else { \
(head)->tqh_last = (elm)->field.tqe_prev; \
NOTE: `timercmp' does not work for >= or <=. */
# define timerisset(tvp) ((tvp)->tv_sec || (tvp)->tv_usec)
# define timerclear(tvp) ((tvp)->tv_sec = (tvp)->tv_usec = 0)
-# define timercmp(a, b, CMP) \
- (((a)->tv_sec == (b)->tv_sec) ? \
- ((a)->tv_usec CMP (b)->tv_usec) : \
+# define timercmp(a, b, CMP) \
+ (((a)->tv_sec == (b)->tv_sec) ? \
+ ((a)->tv_usec CMP (b)->tv_usec) : \
((a)->tv_sec CMP (b)->tv_sec))
# define timeradd(a, b, result) \
do { \
#define CSTART CTRL('q')
#define CSTOP CTRL('s')
#define CLNEXT CTRL('v')
-#define CDISCARD CTRL('o')
-#define CWERASE CTRL('w')
-#define CREPRINT CTRL('r')
+#define CDISCARD CTRL('o')
+#define CWERASE CTRL('w')
+#define CREPRINT CTRL('r')
#define CEOT CEOF
/* compat */
#define CBRK CEOL
/* Copyright (C) 1991,1992,1994,1995,1996,1997,1998,1999,2000,2001,2002
- Free Software Foundation, Inc.
+ Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
__tgmres = Fct (Val); \
else if (sizeof (Val) == sizeof (float)) \
__tgmres = Fct##f (Val); \
- else \
+ else \
__tgmres = __tgml(Fct) (Val); \
__tgmres; }))
__tgmres = Fct (Val1, Val2); \
else if (sizeof (Val1) == sizeof (float)) \
__tgmres = Fct##f (Val1, Val2); \
- else \
+ else \
__tgmres = __tgml(Fct) (Val1, Val2); \
__tgmres; }))
else \
__tgmres = Cfct (Val); \
} \
- else \
+ else \
{ \
if (sizeof (__real__ (Val)) == sizeof (Val)) \
__tgmres = Fct##f (Val); \
__tgmres = Fct (Val); \
else if (sizeof (Val) == sizeof (__complex__ float)) \
__tgmres = Fct##f (Val); \
- else \
+ else \
__tgmres = __tgml(Fct) (Val); \
__tgmres; }))
#define TTY_ON 0x01 /* enable logins (start ty_getty program) */
#define TTY_SECURE 0x02 /* allow uid of 0 to login */
int ty_status; /* status flags */
- char *ty_window; /* command to start up window manager */
+ char *ty_window; /* command to start up window manager */
char *ty_comment; /* comment field */
};
The field `has_arg' is:
no_argument (or 0) if the option does not take an argument,
required_argument (or 1) if the option requires an argument,
- optional_argument (or 2) if the option takes an optional argument.
+ optional_argument (or 2) if the option takes an optional argument.
If the field `flag' is not NULL, it points to a variable that is set
to the value given in the field `val' when the option is found, but
#define SIOCGIFMTU 0x8921 /* get MTU size */
#define SIOCSIFMTU 0x8922 /* set MTU size */
#define SIOCSIFNAME 0x8923 /* set interface name */
-#define SIOCSIFHWADDR 0x8924 /* set hardware address */
+#define SIOCSIFHWADDR 0x8924 /* set hardware address */
#define SIOCGIFENCAP 0x8925 /* get/set encapsulations */
#define SIOCSIFENCAP 0x8926
#define SIOCGIFHWADDR 0x8927 /* Get hardware address */
#define SIOCGIFCOUNT 0x8938 /* get number of devices */
#define SIOCGIFBR 0x8940 /* Bridging support */
-#define SIOCSIFBR 0x8941 /* Set bridging options */
+#define SIOCSIFBR 0x8941 /* Set bridging options */
#define SIOCGIFTXQLEN 0x8942 /* Get the tx queue length */
-#define SIOCSIFTXQLEN 0x8943 /* Set the tx queue length */
+#define SIOCSIFTXQLEN 0x8943 /* Set the tx queue length */
/* ARP cache control calls. */
names as their own. Because these are device dependent it is a good
idea _NOT_ to issue them to random objects and hope. */
-#define SIOCDEVPRIVATE 0x89F0 /* to 89FF */
+#define SIOCDEVPRIVATE 0x89F0 /* to 89FF */
/*
* These 16 ioctl calls are protocol private
#ifdef __USE_MISC
/* ipcs ctl commands */
-# define SHM_STAT 13
-# define SHM_INFO 14
+# define SHM_STAT 13
+# define SHM_INFO 14
/* shm_mode upper byte flags */
# define SHM_DEST 01000 /* segment will be destroyed on last detach */
#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgb %b2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgb %b2, %1" \
: "=a" (ret), "=m" (*mem) \
: "q" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgw %w2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgw %w2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgl %2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgl %2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "m" (*mem), "0" (oldval)); \
ret; })
# ifdef __PIC__
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ ("xchgl %2, %%ebx\n\t" \
+ __asm__ __volatile__ ("xchgl %2, %%ebx\n\t" \
LOCK_PREFIX "cmpxchg8b %1\n\t" \
"xchgl %2, %%ebx" \
: "=A" (ret), "=m" (*mem) \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ ("xchgl %0, %1" \
+ __asm__ __volatile__ ("xchgl %0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else \
({ __typeof (*mem) __result; \
__typeof (value) __addval = (value); \
if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "xaddb %b0, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "xaddb %b0, %1" \
: "=r" (__result), "=m" (*mem) \
: "0" (__addval), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "xaddw %w0, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "xaddw %w0, %1" \
: "=r" (__result), "=m" (*mem) \
: "0" (__addval), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
#define atomic_add_negative(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; sets %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "iq" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; sets %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
#define atomic_add_zero(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; setz %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; setz %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
#define atomic_increment(mem) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "incb %b0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incb %b0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "incw %w0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incw %w0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "incl %0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incl %0" \
: "=m" (*mem) \
: "m" (*mem)); \
else \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "incl %0; sete %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "incl %0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else \
#define atomic_decrement(mem) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "decb %b0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decb %b0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "decw %w0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decw %w0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "decl %0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decl %0" \
: "=m" (*mem) \
: "m" (*mem)); \
else \
do \
__tmpval = __oldval; \
while ((__oldval = __arch_compare_and_exchange_val_64_acq \
- (__memp, __oldval - 1, __oldval)) == __tmpval); \
+ (__memp, __oldval - 1, __oldval)) == __tmpval); \
} \
})
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "decl %0; sete %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "decl %0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else \
__asm__ __volatile__ (LOCK_PREFIX "btsl %3, %1; setc %0" \
: "=q" (__result), "=m" (*mem) \
: "m" (*mem), "ir" (bit)); \
- else \
+ else \
abort (); \
__result; })
else \
__asm__ ("rorw $8, %w0" \
: "=r" (__v) \
- : "0" (__x) \
- : "cc"); \
+ : "0" (__x) \
+ : "cc"); \
__v; }))
# else
/* This is better than nothing. */
__result = __arch_compare_and_exchange_val_32_acq(mem, newval, oldval); \
else if (sizeof (*mem) == 8) \
__result = __arch_compare_and_exchange_val_64_acq(mem, newval, oldval); \
- else \
+ else \
abort (); \
__result; \
})
__result = __arch_compare_and_exchange_val_32_rel(mem, newval, oldval); \
else if (sizeof (*mem) == 8) \
__result = __arch_compare_and_exchange_val_64_rel(mem, newval, oldval); \
- else \
+ else \
abort (); \
__result; \
})
__result = __arch_atomic_exchange_32_acq (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_64_acq (mem, value); \
- else \
+ else \
abort (); \
__result; \
})
__result = __arch_atomic_exchange_32_rel (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_64_rel (mem, value); \
- else \
+ else \
abort (); \
__result; \
})
__result = __arch_atomic_exchange_and_add_32 (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_and_add_64 (mem, value); \
- else \
+ else \
abort (); \
__result; \
})
__result = __arch_atomic_increment_val_32 (mem); \
else if (sizeof (*(mem)) == 8) \
__result = __arch_atomic_increment_val_64 (mem); \
- else \
+ else \
abort (); \
__result; \
})
__result = __arch_atomic_decrement_val_32 (mem); \
else if (sizeof (*(mem)) == 8) \
__result = __arch_atomic_decrement_val_64 (mem); \
- else \
+ else \
abort (); \
__result; \
})
#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgb %b2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgb %b2, %1" \
: "=a" (ret), "=m" (*mem) \
: "q" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgw %w2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgw %w2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgl %2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgl %2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
- __asm__ __volatile__ (LOCK_PREFIX "cmpxchgq %q2, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "cmpxchgq %q2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" ((long) (newval)), "m" (*mem), \
"0" ((long) (oldval))); \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ ("xchgl %0, %1" \
+ __asm__ __volatile__ ("xchgl %0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else \
#define atomic_exchange_and_add(mem, value) \
({ __typeof (*mem) result; \
if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "xaddb %b0, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "xaddb %b0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "xaddw %w0, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "xaddw %w0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
: "=r" (result), "=m" (*mem) \
: "0" (value), "m" (*mem)); \
else \
- __asm__ __volatile__ (LOCK_PREFIX "xaddq %q0, %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "xaddq %q0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" ((long) (value)), "m" (*mem)); \
result; })
#define atomic_add_negative(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; sets %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; sets %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else \
- __asm__ __volatile__ (LOCK_PREFIX "addq %q2, %0; sets %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addq %q2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" ((long) (value)), "m" (*mem)); \
__result; })
#define atomic_add_zero(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; setz %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addb %b2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; setz %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addw %w2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else \
- __asm__ __volatile__ (LOCK_PREFIX "addq %q2, %0; setz %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "addq %q2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" ((long) (value)), "m" (*mem)); \
__result; })
#define atomic_increment(mem) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "incb %b0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incb %b0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "incw %w0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incw %w0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "incl %0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incl %0" \
: "=m" (*mem) \
: "m" (*mem)); \
else \
- __asm__ __volatile__ (LOCK_PREFIX "incq %q0" \
+ __asm__ __volatile__ (LOCK_PREFIX "incq %q0" \
: "=m" (*mem) \
: "m" (*mem)); \
})
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "incl %0; sete %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "incl %0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else \
#define atomic_decrement(mem) \
(void) ({ if (sizeof (*mem) == 1) \
- __asm__ __volatile__ (LOCK_PREFIX "decb %b0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decb %b0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
- __asm__ __volatile__ (LOCK_PREFIX "decw %w0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decw %w0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "decl %0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decl %0" \
: "=m" (*mem) \
: "m" (*mem)); \
else \
- __asm__ __volatile__ (LOCK_PREFIX "decq %q0" \
+ __asm__ __volatile__ (LOCK_PREFIX "decq %q0" \
: "=m" (*mem) \
: "m" (*mem)); \
})
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
- __asm__ __volatile__ (LOCK_PREFIX "decl %0; sete %1" \
+ __asm__ __volatile__ (LOCK_PREFIX "decl %0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else \
__asm__ __volatile__ (LOCK_PREFIX "btsl %3, %1; setc %0" \
: "=q" (__result), "=m" (*mem) \
: "m" (*mem), "ir" (bit)); \
- else \
+ else \
__asm__ __volatile__ (LOCK_PREFIX "btsq %3, %1; setc %0" \
: "=q" (__result), "=m" (*mem) \
: "m" (*mem), "ir" (bit)); \
#define SEM_FAILED ((sem_t *) 0)
/* Maximum value the semaphore can have. */
-#define SEM_VALUE_MAX ((int) ((~0u) >> 1))
+#define SEM_VALUE_MAX ((int) ((~0u) >> 1))
__BEGIN_DECLS