perf/x86: Add compiler barrier after updating BTS

Since BTS is coherent, simply add a compiler barrier to separate the BTS
update and aux_head store.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20210809111407.596077-5-leo.yan@linaro.org

diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
index 6320d2c..974e917 100644 (file)
--- a/arch/x86/events/intel/bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -209,6 +209,12 @@ static void bts_update(struct bts_ctx *bts)
        } else {
                local_set(&buf->data_size, head);
        }
+
+       /*
+        * Since BTS is coherent, just add compiler barrier to ensure
+        * BTS updating is ordered against bts::handle::event.
+        */
+       barrier();
 }
 
 static int