[X86] Fix machineverifier error on avx512f-256-set0.mir

Previously the pass ran the entire llc pipeline which caused the IR to be recodegened.

This commit restricts it to just running the postrapseudos pass and checking the results of that instead of the final assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361991 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/avx512f-256-set0.mir b/test/CodeGen/X86/avx512f-256-set0.mir
index 6ba37b0..45fbafa 100644 (file)
--- a/test/CodeGen/X86/avx512f-256-set0.mir
+++ b/test/CodeGen/X86/avx512f-256-set0.mir
@@ -1,8 +1,9 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s -run-pass=postrapseudos -verify-machineinstrs | FileCheck %s
+
 # Test that we emit VPXORD with ZMM registers instead of YMM
 # registers when we do not have VLX.
-#
-# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s | FileCheck %s
-# CHECK: vpxord %zmm16, %zmm16, %zmm16
+
 --- |
   ; ModuleID = 'test.ll'
   source_filename = "test.ll"
@@ -59,6 +60,10 @@ constants:       []
 machineFunctionInfo: {}
 body:             |
   bb.0.bb0:
+    ; CHECK-LABEL: name: main
+    ; CHECK: $zmm16 = VPXORDZrr undef $zmm16, undef $zmm16
+    ; CHECK: VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store 32 into %ir.lsr.iv1, align 64)
+    ; CHECK: RET 0
     renamable $ymm16 = AVX512_256_SET0
     VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store 32 into %ir.lsr.iv1, align 64)
     RET 0