2008-03-04 Paul Brook <paul@codesourcery.com>

	gas/
	* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
	(arm_ext_v7m): Rename...
	(arm_ext_m): ... to this.  Include v6-M.
	(do_t_add_sub): Allow narrow low-reg non flag setting adds.
	(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
	(md_assemble): Allow wide msr instructions.
	(insns): Add classifications for v6-m instructions.
	(arm_cpu_option_table): Add cortex-m1.
	(arm_arch_option_table): Add armv6-m.
	(cpu_arch): Add ARM_ARCH_V6M.  Fix numbering of other v6 variants.

	gas/testsuite/
	* gas/arm/archv6m.d: New test.
	* gas/arm/archv6m.s: New test.
	* gas/arm/t16-bad.s: Test low register non flag setting add.
	* gas/arm/t16-bad.l: Update expected output.

	include/opcode/
	* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
	(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 9b2c5c3..8b44072 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2008-03-04  Paul Brook  <paul@codesourcery.com>
+
+       * arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
+       (ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
+       (ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
+
 2008-02-27  Denis Vlasenko  <vda.linux@googlemail.com>
            Nick Clifton  <nickc@redhat.com>
 

diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 24a89cf..5f93fd7 100644 (file)
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -44,6 +44,9 @@
 #define ARM_EXT_V7A     0x00100000     /* Arm V7A.                */
 #define ARM_EXT_V7R     0x00200000     /* Arm V7R.                */
 #define ARM_EXT_V7M     0x00400000     /* Arm V7M.                */
+#define ARM_EXT_V6M     0x00800000     /* ARM V6M.                 */
+#define ARM_EXT_BARRIER         0x01000000     /* DSB/DMB/ISB.             */
+#define ARM_EXT_THUMB_MSR 0x02000000   /* Thumb MSR/MRS.           */
 
 /* Co-processor space extensions.  */
 #define ARM_CEXT_XSCALE   0x00000001   /* Allow MIA etc.          */
@@ -87,17 +90,22 @@
 #define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
 #define ARM_AEXT_V6Z    (ARM_AEXT_V6    | ARM_EXT_V6Z)
 #define ARM_AEXT_V6ZK   (ARM_AEXT_V6    | ARM_EXT_V6K | ARM_EXT_V6Z)
-#define ARM_AEXT_V6T2   (ARM_AEXT_V6    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM)
+#define ARM_AEXT_V6T2   (ARM_AEXT_V6 \
+    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR)
 #define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
 #define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
 #define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
-#define ARM_AEXT_V7_ARM        (ARM_AEXT_V6ZKT2 | ARM_EXT_V7)
+#define ARM_AEXT_V7_ARM        (ARM_AEXT_V6ZKT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
 #define ARM_AEXT_V7A   (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
 #define ARM_AEXT_V7R   (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
 #define ARM_AEXT_NOTM \
   (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
+#define ARM_AEXT_V6M \
+  ((ARM_AEXT_V6K | ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) \
+   & ~(ARM_AEXT_NOTM))
 #define ARM_AEXT_V7M \
-  ((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM))
+  ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
+   & ~(ARM_AEXT_NOTM))
 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
 
 /* Processors with specific extensions in the co-processor space.  */
@@ -158,6 +166,7 @@
 #define ARM_ARCH_V6KT2 ARM_FEATURE (ARM_AEXT_V6KT2, 0)
 #define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
 #define ARM_ARCH_V6ZKT2        ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
+#define ARM_ARCH_V6M   ARM_FEATURE (ARM_AEXT_V6M, 0)
 #define ARM_ARCH_V7    ARM_FEATURE (ARM_AEXT_V7, 0)
 #define ARM_ARCH_V7A   ARM_FEATURE (ARM_AEXT_V7A, 0)
 #define ARM_ARCH_V7R   ARM_FEATURE (ARM_AEXT_V7R, 0)