AArch64: Fix def use.

Add comment to GenPCUseDefEncoding(). Fix def-use flags for several
instruction encodings.

Change-Id: Ifc5a2484395486c01a64307a4acddc794026d46a

diff --git a/compiler/dex/quick/arm64/assemble_arm64.cc b/compiler/dex/quick/arm64/assemble_arm64.cc
index 3bfe9a1..416a13e 100644 (file)
--- a/compiler/dex/quick/arm64/assemble_arm64.cc
+++ b/compiler/dex/quick/arm64/assemble_arm64.cc
@@ -105,7 +105,7 @@ namespace art {
 const ArmEncodingMap Arm64Mir2Lir::EncodingMap[kA64Last] = {
     ENCODING_MAP(WIDE(kA64Adc3rrr), SF_VARIANTS(0x1a000000),
                  kFmtRegR, 4, 0, kFmtRegR, 9, 5, kFmtRegR, 20, 16,
-                 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
+                 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
                  "adc", "!0r, !1r, !2r", kFixupNone),
     ENCODING_MAP(WIDE(kA64Add4RRdT), SF_VARIANTS(0x11000000),
                  kFmtRegROrSp, 4, 0, kFmtRegROrSp, 9, 5, kFmtBitBlt, 21, 10,
@@ -113,7 +113,7 @@ const ArmEncodingMap Arm64Mir2Lir::EncodingMap[kA64Last] = {
                  "add", "!0R, !1R, #!2d!3T", kFixupNone),
     ENCODING_MAP(WIDE(kA64Add4rrro), SF_VARIANTS(0x0b000000),
                  kFmtRegR, 4, 0, kFmtRegR, 9, 5, kFmtRegR, 20, 16,
-                 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE1,
+                 kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,
                  "add", "!0r, !1r, !2r!3o", kFixupNone),
     ENCODING_MAP(WIDE(kA64Add4RRre), SF_VARIANTS(0x0b200000),
                  kFmtRegROrSp, 4, 0, kFmtRegROrSp, 9, 5, kFmtRegR, 20, 16,

diff --git a/compiler/dex/quick/arm64/target_arm64.cc b/compiler/dex/quick/arm64/target_arm64.cc
index be3cd8e..8264a06 100644 (file)
--- a/compiler/dex/quick/arm64/target_arm64.cc
+++ b/compiler/dex/quick/arm64/target_arm64.cc
@@ -158,6 +158,9 @@ ResourceMask Arm64Mir2Lir::GetRegMaskCommon(const RegStorage& reg) const {
 }
 
 ResourceMask Arm64Mir2Lir::GetPCUseDefEncoding() const {
+  // Note: On arm64, we are not able to set pc except branch instructions, which is regarded as a
+  //       kind of barrier. All other instructions only use pc, which has no dependency between any
+  //       of them. So it is fine to just return kEncodeNone here.
   return kEncodeNone;
 }
 
@@ -167,6 +170,7 @@ void Arm64Mir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags,
   DCHECK_EQ(cu_->instruction_set, kArm64);
   DCHECK(!lir->flags.use_def_invalid);
 
+  // Note: REG_USE_PC is ignored, the reason is the same with what we do in GetPCUseDefEncoding().
   // These flags are somewhat uncommon - bypass if we can.
   if ((flags & (REG_DEF_SP | REG_USE_SP | REG_DEF_LR)) != 0) {
     if (flags & REG_DEF_SP) {