/// IsInTextSection - True if the current section we are emitting to is a
/// text section.
bool IsInTextSection;
-
+
+ /// VerboseAsm - Emit comments in assembly output if this is true.
+ ///
+ bool VerboseAsm;
+
protected:
AsmPrinter(raw_ostream &o, TargetMachine &TM,
- const TargetAsmInfo *T, bool F);
+ const TargetAsmInfo *T, bool F, bool V);
public:
virtual ~AsmPrinter();
-
+
+ /// isVerbose - Return true if assembly output should contain comments.
+ ///
+ bool isVerbose() const { return VerboseAsm; }
+
/// SwitchToTextSection - Switch to the specified section of the executable
/// if we are not already in it! If GV is non-null and if the global has an
/// explicitly requested section, we switch to the section indicated for the
static Reloc::Model getRelocationModel();
/// setRelocationModel - Sets the code generation relocation model.
+ ///
static void setRelocationModel(Reloc::Model Model);
/// getCodeModel - Returns the code model. The choices are small, kernel,
static CodeModel::Model getCodeModel();
/// setCodeModel - Sets the code model.
+ ///
static void setCodeModel(CodeModel::Model Model);
+ /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
+ ///
+ static bool getAsmVerbosityDefault();
+
+ /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
+ /// is false.
+ static void setAsmVerbosityDefault(bool);
+
/// CodeGenFileType - These enums are meant to be passed into
/// addPassesToEmitFile to indicate what type of file to emit.
enum CodeGenFileType {
/// addAssemblyEmitter - This pass should be overridden by the target to add
/// the asmprinter, if asm emission is supported. If this is not supported,
/// 'true' should be returned.
- virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
- raw_ostream &) {
+ virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
+ bool /* VerboseAsmDefault */, raw_ostream &) {
return true;
}
/// realigned, if needed.
extern bool RealignStack;
- /// VerboseAsm - When this flag is set, the asm printer prints additional
- /// comments to asm directives.
- extern bool VerboseAsm;
-
/// DisableJumpTables - This flag indicates jump tables should not be
/// generated.
extern bool DisableJumpTables;
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/DwarfWriter.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
#include <cerrno>
using namespace llvm;
+static cl::opt<cl::boolOrDefault>
+AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
+ cl::init(cl::BOU_UNSET));
+
char AsmPrinter::ID = 0;
AsmPrinter::AsmPrinter(raw_ostream &o, TargetMachine &tm,
- const TargetAsmInfo *T, bool F)
+ const TargetAsmInfo *T, bool F, bool VDef)
: MachineFunctionPass(&ID), FunctionNumber(0), Fast(F), O(o),
TM(tm), TAI(T), TRI(tm.getRegisterInfo()),
IsInTextSection(false)
-{}
+{
+ switch (AsmVerbose) {
+ case cl::BOU_UNSET: VerboseAsm = VDef; break;
+ case cl::BOU_TRUE: VerboseAsm = true; break;
+ case cl::BOU_FALSE: VerboseAsm = false; break;
+ }
+}
AsmPrinter::~AsmPrinter() {
for (gcp_iterator I = GCMetadataPrinters.begin(),
Asm->EOL("Offset");
} else if (Reg < 64) {
Asm->EmitInt8(DW_CFA_offset + Reg);
- if (VerboseAsm)
+ if (Asm->isVerbose())
Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
else
Asm->EOL();
// Emit the code (index) for the abbreviation.
Asm->EmitULEB128Bytes(AbbrevNumber);
- if (VerboseAsm)
+ if (Asm->isVerbose())
Asm->EOL(std::string("Abbrev [" +
utostr(AbbrevNumber) +
"] 0x" + utohexstr(Die->getOffset()) +
// Isolate current sections line info.
const std::vector<SrcLineInfo> &LineInfos = SectionSourceLines[j];
- if (VerboseAsm) {
+ if (Asm->isVerbose()) {
const Section* S = SectionMap[j + 1];
O << '\t' << TAI->getCommentString() << " Section"
<< S->getName() << '\n';
unsigned LabelID = MMI->MappedLabel(LineInfo.getLabelID());
if (!LabelID) continue;
- if (!VerboseAsm)
+ if (!Asm->isVerbose())
Asm->EOL();
else {
std::pair<unsigned, unsigned> SourceID =
default:
break;
case TargetMachine::AssemblyFile:
- if (addAssemblyEmitter(PM, Fast, Out))
+ if (addAssemblyEmitter(PM, Fast, getAsmVerbosityDefault(), Out))
return FileModel::Error;
return FileModel::AsmFile;
case TargetMachine::ObjectFile:
FunctionPass *createARMISelDag(ARMTargetMachine &TM);
FunctionPass *createARMCodePrinterPass(raw_ostream &O,
ARMTargetMachine &TM,
- bool Fast);
+ bool Fast, bool Verbose);
FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createARMLoadStoreOptimizationPass();
}
bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
+ bool Verbose, raw_ostream &Out) {
// Output assembly language.
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(Out, *this, Fast));
+ PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, Fast));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, Fast));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
ARMTargetMachine &tm,
- bool fast);
+ bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool InCPMode;
public:
ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
InCPMode(false) {
Subtarget = &TM.getSubtarget<ARMSubtarget>();
}
}
}
-static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
+static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
+ const TargetAsmInfo *TAI) {
assert(V < (1 << 12) && "Not a valid so_imm value!");
unsigned Imm = ARM_AM::getSOImmValImm(V);
unsigned Rot = ARM_AM::getSOImmValRot(V);
void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
const MachineOperand &MO = MI->getOperand(OpNum);
assert(MO.isImm() && "Not a valid so_imm value!");
- printSOImm(O, MO.getImm(), TAI);
+ printSOImm(O, MO.getImm(), VerboseAsm, TAI);
}
/// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
assert(MO.isImm() && "Not a valid so_imm value!");
unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
- printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
+ printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
O << "\n\torr";
printPredicateOperand(MI, 2);
O << " ";
O << ", ";
printOperand(MI, 0);
O << ", ";
- printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
+ printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
}
// so_reg is a 4-operand unit corresponding to register forms of the A5.1
///
FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
ARMTargetMachine &tm,
- bool fast) {
- return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
namespace {
FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM);
FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS,
TargetMachine &TM,
- bool Fast);
+ bool Fast, bool Verbose);
FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
MachineCodeEmitter &MCE);
PM.add(createAlphaBranchSelectionPass());
return false;
}
-bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
+bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
+ bool Verbose,
raw_ostream &Out) {
PM.add(createAlphaLLRPPass(*this));
- PM.add(createAlphaCodePrinterPass(Out, *this, Fast));
+ PM.add(createAlphaCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createAlphaCodeEmitterPass(*this, MCE));
if (DumpAsm)
- PM.add(createAlphaCodePrinterPass(errs(), *this, Fast));
+ PM.add(createAlphaCodePrinterPass(errs(), *this, Fast, true));
return false;
}
bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
///
AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(o, tm, T, F) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(o, tm, T, F, V) {}
virtual const char *getPassName() const {
return "Alpha Assembly Printer";
///
FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o,
TargetMachine &tm,
- bool fast) {
- return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
#include "AlphaGenAsmWriter.inc"
std::set<std::string> FnStubs, GVStubs;
public:
SPUAsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, bool F) :
- AsmPrinter(O, TM, T, F) {}
+ const TargetAsmInfo *T, bool F, bool V) :
+ AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "STI CBEA SPU Assembly Printer";
MachineModuleInfo *MMI;
public:
LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : SPUAsmPrinter(O, TM, T, F), DW(0), MMI(0) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : SPUAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
virtual const char *getPassName() const {
return "STI CBEA SPU Assembly Printer";
///
FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o,
SPUTargetMachine &tm,
- bool fast) {
- return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
FunctionPass *createSPUAsmPrinterPass(raw_ostream &o,
SPUTargetMachine &tm,
- bool fast);
+ bool fast, bool verbose);
/*--== Utility functions/predicates/etc used all over the place: --==*/
//! Predicate test for a signed 10-bit value
}
bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
- PM.add(createSPUAsmPrinterPass(Out, *this, Fast));
+ bool Verbose, raw_ostream &Out) {
+ PM.add(createSPUAsmPrinterPass(Out, *this, Fast, Verbose));
return false;
}
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, bool /*Fast*/);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool /*Fast*/,
- raw_ostream &Out);
+ bool /*Verbose*/, raw_ostream &Out);
};
} // end namespace llvm
///
FunctionPass *createIA64CodePrinterPass(raw_ostream &o,
IA64TargetMachine &tm,
- bool fast);
+ bool fast, bool verbose);
} // End llvm namespace
std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
public:
IA64AsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "IA64 Assembly Printer";
///
FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o,
IA64TargetMachine &tm,
- bool fast) {
- return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
return true;
}
bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
- PM.add(createIA64CodePrinterPass(Out, *this, Fast));
+ bool Verbose, raw_ostream &Out) {
+ PM.add(createIA64CodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
};
} // End llvm namespace
FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
FunctionPass *createMipsCodePrinterPass(raw_ostream &OS,
MipsTargetMachine &TM,
- bool Fast);
+ bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for Mips registers. This defines a mapping from
const MipsSubtarget *Subtarget;
public:
MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F) {
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V) {
Subtarget = &TM.getSubtarget<MipsSubtarget>();
}
/// regardless of whether the function is in SSA form.
FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o,
MipsTargetMachine &tm,
- bool fast) {
- return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
//===----------------------------------------------------------------------===//
// true if AssemblyEmitter is supported
bool MipsTargetMachine::
addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out)
+ bool Verbose, raw_ostream &Out)
{
// Output assembly language.
- PM.add(createMipsCodePrinterPass(Out, *this, Fast));
+ PM.add(createMipsCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
};
/// MipselTargetMachine - Mipsel target machine.
FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM);
FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS,
PIC16TargetMachine &TM,
- bool Fast);
+ bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for PIC16 registers. This defines a mapping from
///
FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o,
PIC16TargetMachine &tm,
- bool fast) {
- return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
void PIC16AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
namespace llvm {
struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter {
- PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F) {
+ PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V) {
CurBank = "";
IsRomData = false;
}
}
bool PIC16TargetMachine::
-addAssemblyEmitter(PassManagerBase &PM, bool Fast, raw_ostream &Out) {
+addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose,
+ raw_ostream &Out) {
// Output assembly language.
- PM.add(createPIC16CodePrinterPass(Out, *this, Fast));
+ PM.add(createPIC16CodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
}; // PIC16TargetMachine.
/// CooperTargetMachine
const PPCSubtarget &Subtarget;
public:
PPCAsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F),
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V),
Subtarget(TM.getSubtarget<PPCSubtarget>()) {}
virtual const char *getPassName() const {
MachineModuleInfo *MMI;
public:
PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : PPCAsmPrinter(O, TM, T, F), DW(0), MMI(0) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
virtual const char *getPassName() const {
return "Linux PPC Assembly Printer";
raw_ostream &OS;
public:
PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : PPCAsmPrinter(O, TM, T, F), DW(0), MMI(0), OS(O) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0), OS(O) {}
virtual const char *getPassName() const {
return "Darwin PPC Assembly Printer";
///
FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o,
PPCTargetMachine &tm,
- bool fast) {
+ bool fast, bool verbose) {
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();
if (Subtarget->isDarwin()) {
- return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
} else {
- return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
}
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS,
PPCTargetMachine &TM,
- bool Fast);
+ bool Fast, bool Verbose);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
} // end namespace llvm;
}
bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
+ bool Verbose, raw_ostream &Out) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(Out, *this, Fast));
+ PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, Fast));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, Fast));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
PPCTargetMachine &tm,
- bool fast);
+ bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
ValueMapTy NumberForBB;
public:
SparcAsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "Sparc Assembly Printer";
///
FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o,
TargetMachine &tm,
- bool fast) {
- return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
/// runOnMachineFunction - This uses the printInstruction()
class raw_ostream;
FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
- FunctionPass *createSparcCodePrinterPass(raw_ostream &OS,
- TargetMachine &TM, bool Fast);
+ FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM,
+ bool Fast, bool Verbose);
FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
} // end namespace llvm;
}
bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
+ bool Verbose, raw_ostream &Out) {
// Output assembly language.
- PM.add(createSparcCodePrinterPass(Out, *this, Fast));
+ PM.add(createSparcCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
};
} // end namespace llvm
bool PerformTailCallOpt;
unsigned StackAlignment;
bool RealignStack;
- bool VerboseAsm;
bool DisableJumpTables;
bool StrongPHIElim;
bool DisableRedZone;
+ bool AsmVerbosityDefault(false);
}
static cl::opt<bool, true>
cl::location(RealignStack),
cl::init(true));
static cl::opt<bool, true>
-AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
- cl::location(VerboseAsm),
- cl::init(false));
-static cl::opt<bool, true>
DisableSwitchTables(cl::Hidden, "disable-jump-tables",
cl::desc("Do not generate jump tables."),
cl::location(DisableJumpTables),
CMModel = Model;
}
+bool TargetMachine::getAsmVerbosityDefault() {
+ return AsmVerbosityDefault;
+}
+
+void TargetMachine::setAsmVerbosityDefault(bool V) {
+ AsmVerbosityDefault = V;
+}
+
namespace llvm {
/// LessPreciseFPMAD - This flag return true when -enable-fp-mad option
/// is specified on the command line. When this flag is off(default), the
const X86Subtarget *Subtarget;
public:
X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F), DW(0), MMI(0) {
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {
Subtarget = &TM.getSubtarget<X86Subtarget>();
}
///
FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o,
X86TargetMachine &tm,
- bool fast) {
+ bool fast, bool verbose) {
const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
if (Subtarget->isFlavorIntel()) {
- return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
} else {
- return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
}
struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F) {}
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "X86 Intel-Style Assembly Printer";
///
FunctionPass *createX86CodePrinterPass(raw_ostream &o,
X86TargetMachine &tm,
- bool fast);
+ bool fast, bool Verbose);
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.
}
bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
+ bool Verbose, raw_ostream &Out) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(Out, *this, Fast));
+ PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, Fast));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, Fast));
+ PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
X86TargetMachine &tm,
- bool fast);
+ bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast);
virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM);
FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS,
XCoreTargetMachine &TM,
- bool Fast);
+ bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for XCore registers. This defines a mapping from
const XCoreSubtarget &Subtarget;
public:
XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM,
- const TargetAsmInfo *T, bool F)
- : AsmPrinter(O, TM, T, F), DW(0),
+ const TargetAsmInfo *T, bool F, bool V)
+ : AsmPrinter(O, TM, T, F, V), DW(0),
Subtarget(*TM.getSubtargetImpl()) {}
virtual const char *getPassName() const {
///
FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o,
XCoreTargetMachine &tm,
- bool fast) {
- return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
+ bool fast, bool verbose) {
+ return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
// PrintEscapedString - Print each character of the specified string, escaping
}
bool XCoreTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out) {
+ bool Verbose, raw_ostream &Out) {
// Output assembly language.
- PM.add(createXCoreCodePrinterPass(Out, *this, Fast));
+ PM.add(createXCoreCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- raw_ostream &Out);
+ bool Verbose, raw_ostream &Out);
};
} // end namespace llvm
-; RUN: llvm-as < %s | llc -enable-eh -asm-verbose | grep invcont131
+; RUN: llvm-as < %s | llc -enable-eh | grep invcont131
; PR 1496: tail merge was incorrectly removing this block
; ModuleID = 'report.1.bc'
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##}
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep {#} | not grep -v {##}
%struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
%struct.AGenericManager = type <{ i8 }>
-; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
+; RUN: llvm-as < %s | llc -march=x86 | grep -A 1 lpad | grep Llabel
; Check that register copies in the landing pad come after the EH_LABEL
declare i32 @f()
; RUN: llvm-as < %s | \
-; RUN: llc -mtriple=i686-pc-linux-gnu -o %t -f
+; RUN: llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t -f
; RUN: grep set %t | count 7
; RUN: grep globl %t | count 6
; RUN: grep weak %t | count 1
-; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu | not grep -F .text
-; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | not grep lea
-; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | grep add | count 2
+; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
+; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
+; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
declare void @_Z3bari(i32)