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ARM: S3C2443: Fix bit-reset in setrate of clk_armdiv
author
Heiko Stuebner
<heiko@sntech.de>
Mon, 26 Sep 2011 01:30:29 +0000
(10:30 +0900)
committer
Kukjin Kim
<kgene.kim@samsung.com>
Mon, 26 Sep 2011 01:30:29 +0000
(10:30 +0900)
The changed statement should set the old armdiv bits to 0
and not everything else, before setting the new value.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s3c2443/clock.c
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diff --git
a/arch/arm/mach-s3c2443/clock.c
b/arch/arm/mach-s3c2443/clock.c
index
a1a7176
..
38058af
100644
(file)
--- a/
arch/arm/mach-s3c2443/clock.c
+++ b/
arch/arm/mach-s3c2443/clock.c
@@
-128,7
+128,7
@@
static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
unsigned long clkcon0;
clkcon0 = __raw_readl(S3C2443_CLKDIV0);
- clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
+ clkcon0 &=
~
S3C2443_CLKDIV0_ARMDIV_MASK;
clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
__raw_writel(clkcon0, S3C2443_CLKDIV0);
}