drm/bridge: anx7625: config hs packets end aligned to avoid screen shift

This device requires the packets on lanes aligned at the end to fix
screen shift or scroll.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Xin Ji <xji@analogixsemi.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220309073637.3591-4-rex-bc.chen@mediatek.com

diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 31ecf56..4043192 100644 (file)
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -2011,7 +2011,8 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx)
        dsi->format = MIPI_DSI_FMT_RGB888;
        dsi->mode_flags = MIPI_DSI_MODE_VIDEO   |
                MIPI_DSI_MODE_VIDEO_SYNC_PULSE  |
-               MIPI_DSI_MODE_VIDEO_HSE;
+               MIPI_DSI_MODE_VIDEO_HSE |
+               MIPI_DSI_HS_PKT_END_ALIGNED;
 
        ret = devm_mipi_dsi_attach(dev, dsi);
        if (ret) {